# US 2014/0156964 A1 · Semiconductor storage device and buffer operation method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0156964 A1 - Document ID: US20140156964A1 - Status: Published application - Kind: A1 - Application number: 14/056,458 - Filed: 2013-10-17 - Published: 2014-06-05 - Earliest claimed: 2012-12-05 - Assignees: Samsung Electronics Co., Ltd. - Inventors: In-Hwan Choi - Web page: https://patentgrep.com/patent/US20140156964A1 ## CPC - G06F 12/0646: {Configuration or reconfiguration} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method of operating a semiconductor storage device is provided. A memory space of a buffer memory is allocated into a data area for storing user data and a map area for storing map data. The user data and the map data are read from a nonvolatile memory. A size of the user data to be stored in the data are compared with a size of the data area. The size of the data area and the size of the map area are adaptively varied according to the comparison result. ## Claims ### Claim 1 A method of operating a semiconductor storage device, the method comprising: allocating a memory space of a buffer memory into a data area for storing user data and a map area for storing map data, wherein the user data and the map data are read from a nonvolatile memory; comparing a size of the user data to be stored in the data area of the buffer memory with the size of the data area; and adaptively varying the size of the data area and size of the map area according to the comparison result. ### Claim 2 (depends on 1) The method of claim 1, wherein in the case that the size of the user data to be stored in the buffer from the nonvolatile memory is greater than the size of the data area, the map area of the buffer is reduced and the data area of the buffer increases. ### Claim 3 (depends on 2) The method of claim 2, wherein the data area increases when a sequential read operation is performed. ### Claim 4 (depends on 2) The method of claim 2, wherein the map area increases when a random read operation is performed. ### Claim 5 (depends on 1) The method of claim 1, wherein the user data begins to be stored upwardly from a storage area corresponding to a least significant address of the buffer memory and the map data begins to be stored downwardly from a storage area corresponding to a most significant address of the buffer memory. ### Claim 6 (depends on 1) The method of claim 1, wherein the buffer memory stores part of the map data stored in the nonvolatile memory. ### Claim 7 (depends on 2) The method of claim 2, wherein the data area of the buffer memory increases when the user data read from the nonvolatile memory has a relatively large size and is stored in a relatively narrow address space of the nonvolatile memory. ### Claim 8 (depends on 7) The method of claim 7, wherein the map area of the buffer memory increases when the user data read from the nonvolatile memory has a relatively small size and is stored in a relatively wide address space of the nonvolatile memory. ### Claim 9 (depends on 1) The method of claim 1, wherein a boundary between the data area of the buffer and the map area of the buffer memory is changed in real time depending on whether the user data is read from the nonvolatile memory in a sequential read operation mode or a random read operation mode. ### Claim 10 (depends on 9) The method of claim 9, wherein in the case that the data area of the buffer memory is reduced, the map area of the buffer memory is increased. ### Claim 11 (depends on 9) The method of claim 9, wherein in the case that the data area of the buffer is increased, the map area of the buffer is reduced. ### Claim 12 (depends on 1) The method of claim 1, wherein a sum of the size of the data area and the size of the map area is constant. ### Claim 13 A semiconductor storage device comprising: a nonvolatile memory; and a controller including a buffer memory having a data area and a map are and being coupled to the nonvolatile memory, wherein the controller is configured to temporarily store user data and map data read from the nonvolatile memory in the data area and the map area of the buffer memory, wherein the controller is configured to compare a size of the user data to be stored in the buffer with a size of the data area, and wherein the controller adaptively varies the data area and the map area according to the comparison result. ### Claim 14 (depends on 13) The semiconductor storage device of claim 13, wherein the buffer memory is a cache memory and a map area of the buffer is increased by the controller so that a hit ratio of the cache memory is increased. ### Claim 15 (depends on 13) The semiconductor storage device of claim 13, wherein the controller increases the data area of the buffer when a sequential read operation is performed and increases the map area of the buffer when a random read operation is performed. ### Claim 16 A memory controller for operating a nonvolatile memory, comprising: a buffer memory configured to have a predetermined size of a memory space, wherein the memory space is divided into a data area having a first size and a map area having a second size; and a buffer memory controller configured to vary the first size of the data area and the second size of the map area according to a read operation mode of the memory controller, wherein a sum of the first size and the second size is constant. ### Claim 17 (depends on 16) The memory controller of claim 16, where when the read operation mode is a sequential read operation, the buffer memory controller is configured to increase the first size of the data area and reduce the second size of the map area. ### Claim 18 (depends on 17) The memory controller of claim 17, where the user data is stored in a relatively narrow address space of the nonvolatile memory. ### Claim 19 (depends on 16) The memory controller of claim 16, where when the read operation mode is a random read operation, the buffer memory controller is configured to increase the second size of the map area and reduce the first size of the data area. ### Claim 20 (depends on 19) The memory controller of claim 19, where the user data is stored in a relatively wide address space of the nonvolatile memory.