# US 2014/0156945 A1 · Multi-stage translation of prefetch requests > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0156945 A1 - Document ID: US20140156945A1 - Status: Published application - Kind: A1 - Application number: 14/065,700 - Filed: 2013-10-29 - Published: 2014-06-05 - Earliest claimed: 2012-11-30 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Florian A. Auernhammer; Patricia M. Sagmeister - Web page: https://patentgrep.com/patent/US20140156945A1 ## CPC - G06F 12/0862: with prefetch - G06F 12/10: Address translation - G06F 12/1009: using page tables, e.g. page table structures - G06F 12/1027: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] - G06F 2212/602: Details relating to cache prefetching - G06F 2212/65: Details of virtual memory and virtual address translation - G06F 2212/654: Look-ahead translation - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A device for multi-stage translation of prefetch requests includes a prefetch queue for providing queued prefetch requests, each of the queued prefetch requests including N different control entries; N serial-connected translation stages for the translation of N control entries of one of the queued prefetch requests into a translated prefetch request, wherein a translation in a i-th translation stage is dependent on a translation in a (i−1)-th translation stage, i ε [1, . . . ,N]; and a prefetch issuer which is configured to control an index for each of the N different control entries in the prefetch queue and to issue a prefetch of the indexed control entry of the N different control entries for the highest non-stalled translation stage. ## Claims ### Claim 1 A device for multi-stage translation of prefetch requests, the device comprising: a prefetch queue for providing queued prefetch requests, each of the queued prefetch requests including N different control entries; N serial-connected translation stages for the translation of N control entries of one of the queued prefetch requests into a translated prefetch request, wherein a translation in a i-th translation stage is dependent on a translation in a (i−1)-th translation stage, i ε [1, . . . ,N]; and a prefetch issuer which is configured to control an index for each of the N different control entries in the prefetch queue and to issue a prefetch of the indexed control entry of the N different control entries for the highest non-stalled translation stage. ### Claim 2 (depends on 1) The device of claim 1, wherein each translation stage of the N serial-connected translation stages has an allocated cache for caching its translations. ### Claim 3 (depends on 1) The device of claim 1, wherein the N control entries include N disjunct address parts of a data packet. ### Claim 4 (depends on 1) The device of claim 1, wherein the index of the highest translation stage of the N serial-connected translation stages is coupled to a head of the prefetch queue. ### Claim 5 (depends on 1) The device of claim 1, wherein the prefetch issuer is configured to control the indices for prefetches for the N−1 lower translation stages of the N serial-connected translation stages. ### Claim 6 (depends on 1) The device of claim 1, wherein the i-th translation stage is configured to receive the translation from the (i−1)-th translation stage and the control entries associated with the i-th translation stage and the following N−i translation stages, respectively. ### Claim 7 (depends on 6) The device of claim 6, wherein the i-th translation stage has at least N−i allocated conflict slots. ### Claim 8 (depends on 7) The device of claim 7, wherein the i-th translation stage is configured to detect a cache miss in its allocated cache and to send a stall indication to the prefetch issuer, signalling a stall for the translation stage the prefetch request was targeted for. ### Claim 9 (depends on 1) The device of claim 1, wherein the prefetch issuer includes a multiplexer coupled between the prefetch queue and the lowest translation stage of the N serial-connected translation stages and a controller for controlling the multiplexer such that the prefetch of the indexed control entry of the N different control entries for the highest non-stalled translation stage is issued from the prefetch queue to the lowest translation stage. ### Claim 10 (depends on 1) The device of claim 1, wherein the prefetch issuer includes N−1 counters for managing the indices for prefetches for the N−1 lower translation stages of the N serial-connected translation stages. ### Claim 11 (depends on 1) The device of claim 1, wherein the prefetch issuer is configured to issue a prefetch of the indexed control entry for the highest non-stalled translation stage with an update of the least recently used position in the highest non-stalled translation stage, if the index of the control entry associated with the highest non-stalled translation stage corresponds to the index of the control entry associated with the translation stage below the highest non-stalled translation stage. ### Claim 12 (depends on 1) The device of claim 1, wherein the prefetch issuer is configured to issue a prefetch of the indexed control entry for the highest non-stalled translation stage without an update of the least recently used position in the highest non-stalled translation stage, if the index of the control entry associated with the highest non-stalled translation stage is greater than the index of the control entry associated with the translation stage below the highest non-stalled translation stage. ### Claim 13 (depends on 1) An I/O controller for a processing unit, wherein the I/O controller is coupled to the processing unit and to a memory, wherein the I/O controller includes a device of claim 1. ### Claim 14 A method for multi-stage translation of prefetch requests, the method comprising: providing queued prefetch requests by a prefetch queue, wherein each of the queued prefetch requests including N different control entries; translating N control entries of one of the queued prefetch requests into a translated prefetch request by N serial-connected translation stages, wherein a translation in an i-th translation stage is dependent on a translation in an (i−1)-th translation stage, i ε [1, . . . ,N]; controlling an index for each of the N different control entries in the prefetch queue, and issuing a prefetch of the indexed control entry of the N different control entries for the highest non-stalled translation stage. ### Claim 15 (depends on 14) A computer program comprising a program code for executing the method of claim 14 for multi-stage translation of prefetch requests when run on at least one computer.