# US 2014/0156935 A1 · Unified Exclusive Memory

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- Number: US 2014/0156935 A1
- Document ID: US20140156935A1
- Status: Published application
- Kind: A1
- Application number: 13/691,107
- Filed: 2012-11-30
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: Intel Corporation
- Inventors: Shlomo Raikin; Zvika Greenfield
- Web page: https://patentgrep.com/patent/US20140156935A1

## CPC

- G06F 12/0893: Caches characterised by their organisation or structure
- G06F 12/0646: {Configuration or reconfiguration}
- G06F 12/0864: using pseudo-associative means, e.g. set-associative or hashing
- G06F 12/0888: using selective caching, e.g. bypass
- G06F 2212/15: Use in a specific computing environment
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

In one embodiment, a processor includes at least one execution unit, a near memory, and memory management logic. The memory management logic may be to manage the near memory and a far memory as a unified exclusive memory, where the far memory is external to the processor. Other embodiments are described and claimed.

## Claims

### Claim 1

A processor comprising:
at least one execution unit;
a near memory; and
memory management logic to manage the near memory and a far memory as a unified exclusive memory, wherein the far memory is external to the processor.

### Claim 2 (depends on 1)

The processor of claim 1, wherein the unified exclusive memory space is divided into a plurality of locations, wherein the plurality of locations is arranged in a plurality of sets and a plurality of ways.

### Claim 3 (depends on 1)

The processor of claim 1, the memory management logic to, in response to a request for a first data block stored in the far memory, move the first data block from a first location in the far memory to a second location in the near memory.

### Claim 4 (depends on 3)

The processor of claim 3, further comprising a fill buffer to store the first data block during a transfer from the first location to the second location.

### Claim 5 (depends on 3)

The processor of claim 3, the memory management logic further to move a second data block from the second location in the near memory to the first location in the far memory.

### Claim 6 (depends on 5)

The processor of claim 5, further comprising a drain buffer to store the second data block during a transfer from the second location to the first location.

### Claim 7 (depends on 1)

The processor of claim 1, further comprising a tag cache to store tags associated with data blocks stored in the near memory.

### Claim 8 (depends on 1)

The processor of claim 1, further comprising a tag buffer to store tags associated with data blocks being moved between the near memory and the far memory.

### Claim 9

A system comprising:
a far memory;
a processor, coupled to the far memory, including:
a near memory; and
memory management logic to manage the near memory and the far memory as a unified exclusive memory space, wherein the unified exclusive memory space is divided into a plurality of locations, each of a plurality of data blocks to be exclusively stored in the far memory or the near memory.

### Claim 10 (depends on 9)

The system of claim 9, wherein each of the plurality of locations is associated with a unique memory address.

### Claim 11 (depends on 10)

The system of claim 10, wherein the memory address comprises a tag portion, a set portion, and an offset portion.

### Claim 12 (depends on 9)

The system of claim 9, wherein the near memory comprises a first plurality of ways and a plurality of sets, and wherein the far memory comprises a second plurality of ways and the plurality of sets.

### Claim 13 (depends on 9)

The system of claim 9, wherein a first way of the near memory stores a plurality of metadata entries.

### Claim 14 (depends on 13)

The system of claim 13, wherein each of the plurality of metadata entries corresponds to a unique one of the plurality of locations.

### Claim 15

A method, comprising:
determining, by a processor, whether a requested data block is stored exclusively in a near memory of the processor;
upon determining that the requested data block is not stored exclusively in the near memory:
determining a first location of a far memory storing the requested data block; and
moving the requested data block from the first location of the far memory to a second location of the near memory, wherein the far memory is external to the processor.

### Claim 16 (depends on 15)

The method of claim 15, wherein moving the requested data block from the first location of the far memory to the second location of the near memory comprises:
moving the requested data block from the first location of the far memory to a fill buffer; and
moving the requested data block from the fill buffer to the second location of the near memory.

### Claim 17 (depends on 16)

The method of claim 16, further comprising:
moving a second data block from the second location of the near memory to a drain buffer; and
moving the second data block from the drain buffer to the first location of the far memory.

### Claim 18 (depends on 16)

The method of claim 16, further comprising:
updating a tag cache to include a tag associated with the requested data block.

### Claim 19 (depends on 15)

The method of claim 15, further comprising:
upon determining that the requested data block is stored exclusively in the near memory, reading the requested data block from the near memory.

### Claim 20 (depends on 15)

The method of claim 15, wherein determining the first location of the far memory storing the requested memory block comprises reading metadata stored in a first way of the near memory.

### Claim 21 (depends on 15)

The method of claim 15, wherein determining whether the requested data block is stored exclusively in the near memory of the processor comprises checking a tag cache for a tag associated with the requested data block.

### Claim 22 (depends on 21)

The method of claim 21, wherein determining whether the requested data block is stored exclusively in the near memory of the processor further comprises reading metadata stored in a lowest way of the near memory.