# US 2014/0156916 A1 · Control arrangements and methods for accessing block oriented nonvolatile memory > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0156916 A1 - Document ID: US20140156916A1 - Status: Published application - Kind: A1 - Application number: 14/092,731 - Filed: 2013-11-27 - Published: 2014-06-05 - Earliest claimed: 2011-02-02 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Stephen P. Van Aken - Web page: https://patentgrep.com/patent/US20140156916A1 ## CPC - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 2212/1028: Power efficiency - G06F 2212/7201: Logical to physical mapping or translation of blocks or pages - G06F 2212/7205: Cleaning, compaction, garbage collection, erase control - G06F 2212/7206: Reconfiguration of flash memory system - G06F 2212/7207: management of metadata or control data - G06F 2212/7211: Wear leveling - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A read/write arrangement is described for use in accessing at least one nonvolatile memory device in read/write operations with the memory device being made up of a plurality of memory cells which memory cells are organized as a set of pages that are physically and sequentially addressable with each page having a page length such that a page boundary is defined between successive ones of the pages in the set. The read/write arrangement includes a control arrangement that is configured to store and access a group of data blocks that is associated with a given write operation in a successive series of pages of the memory such that at least an initial page in the series is filled and each block includes a block length that is different than the page length. ## Claims ### Claim 1 A memory system for digital data communication with a host device to provide data storage capacity for the host device, said memory system comprising: a plurality of modules, each module including a nonvolatile memory section, wherein at least a particular one of the modules is configured to independently maintain a module portion of a distributed flash translation layer for the nonvolatile memory section of only that particular module based on one or more module input parameters. ### Claim 2 (depends on 1) The memory system of claim 1, further comprising: a controller configured for digital data communication with the host device and further configured for module digital data communication with each of the plurality of modules such that any data flowing to and from the particular module passes through the controller, wherein the controller is configured to provide the one or more module input parameters to the particular module to define an independent execution of the module portion of the distributed flash translation layer. ### Claim 3 (depends on 1) The memory system of claim 1, further comprising: a controller configured to provide the module input parameters to the particular module and wherein the particular module further comprises a flash translation layer parameter section that is configured to receive a first set of flash translation layer parameters from the controller for controlling the independent execution of the module portion of the distributed flash translation layer in a first mode. ### Claim 4 (depends on 3) The memory system of claim 3 wherein the flash translation layer parameter section is further configured to receive a second set of flash translation layer parameters from the particular module for controlling the independent execution of the module portion of the distributed flash translation layer in a second mode. ### Claim 5 (depends on 1) The memory system of claim 1, further comprising: a controller configured to provide the module input parameters to the particular module and wherein the particular module is further configured to selectably operate in a first mode such that the particular module autonomously executes the flash translation layer and to selectably operate in a second mode under at least partial control by the controller such that the particular module executes the flash translation layer in cooperation with the controller. ### Claim 6 (depends on 1) The memory system of claim 1 wherein the particular module further comprises: a function engine for independently performing at least one of a wear leveling function, a garbage collection function and a bit density setting function for the nonvolatile memory section of only the particular module. ### Claim 7 (depends on 6) The memory system of claim 6 wherein said function engine further comprises a reporting section for reporting one or more use statistics relating to the nonvolatile memory of the particular module such that the use statistics are available to at least the function engine. ### Claim 8 (depends on 7) The memory system of claim 7 wherein read-back values are generated by the reporting section responsive to a read operation and wherein the use statistics include at least one of a mean read-back value for at least a set of read values during the read operation and a standard deviation for read-back values for at least the set of read values during the read operation and one or more error correction statistics. ### Claim 9 (depends on 8) The memory system of claim 8 wherein the one or more error correction statistics include at least one of a cumulative error count and a per block error count based on the read operation decoding a block error correction code. ### Claim 10 (depends on 7) The memory system of claim 7 wherein the reporting section is configured to provide a health indication relating to the nonvolatile memory based on the use statistics. ### Claim 11 A module serving as one of a plurality of modules as part of a memory system for digital data communication with a host device to provide data storage capacity for the host device, said module comprising: a nonvolatile memory section; and a function engine configured to independently maintain a module portion of a distributed flash translation layer for the nonvolatile memory section of only that module based on one or more module input parameters. ### Claim 12 A method for use in a module serving as one of a plurality of modules as part of a memory system for digital data communication with a host device to provide data storage capacity for the host device, said method comprising: within the module, independently maintaining a module portion of a distributed flash translation layer for a nonvolatile memory section of only that module based on one or more module input parameters. ### Claim 13 A memory system for digital data communication with a host device to provide data storage capacity for the host device, said memory system comprising: a plurality of modules, each module including a nonvolatile memory section, wherein at least a particular one of the modules is configured to independently perform an error correction function in conjunction with independently performing at least one of a wear leveling function, a garbage collection function and a bit density setting function for the nonvolatile memory section of only the particular module based on one or more module input parameters; and a controller configured for said digital data communication with the host device and further configured for module digital data communication with each of the plurality of modules such that any data flowing to and from each module passes through the controller and at least the controller is configured to provide the module input parameters to the particular module to define an independent execution of at least one of the wear leveling function, the garbage collection function and the bit density function in the particular module. ### Claim 14 (depends on 13) The memory system of claim 13 wherein the particular module further comprises: a function engine for independently performing the error correction function and at least one of the wear leveling function, the garbage collection function and a bit density setting function for the nonvolatile memory section of only the particular module. ### Claim 15 (depends on 14) The memory system of claim 14 wherein said function engine further comprises a reporting section for reporting one or more use statistics relating to the nonvolatile memory of the particular module such that the use statistics are available to at least the function engine. ### Claim 16 (depends on 15) The memory system of claim 15 wherein the reporting section is configured to provide a health indication relating to the nonvolatile memory based on the use statistics. ### Claim 17 (depends on 13) The memory system of claim 13 wherein the particular module is configured to operate at least in a first mode at least for a selected one of the wear leveling function, the garbage collection function and the bit density setting function based on a first set of the one or more module input parameters and to operate in a second mode for the selected one of the functions based on a second set of the one or more module input parameters with the first set of module input parameters being different from the second set of module input parameters. ### Claim 18 (depends on 17) The memory system of claim 17 wherein at least the particular module is further configured to independently execute a flash translation layer only for the nonvolatile memory section of the particular module. ### Claim 19 (depends on 13) The memory system of claim 13, further comprising: the particular module further configured to selectably operate in a first mode such that the particular module autonomously executes a flash translation layer and selectably operates in a second mode under at least partial control by the controller such that the particular module executes the flash translation layer in cooperation with the controller. ### Claim 20 A module serving as one of a plurality of modules as part of a memory system for digital data communication with a host device to provide data storage capacity for the host device, said module comprising: a nonvolatile memory section; and a function engine that is configured to independently perform an error correction function in conjunction with independently performing at least one of a wear leveling function, a garbage collection function and a bit density setting function for the nonvolatile memory section of only that module based on one or more module input parameters. ### Claim 21 A method for use in a module serving as one of a plurality of modules as part of a memory system for digital data communication with a host device to provide data storage capacity for the host device, said method comprising: within the module, independently performing an error correction function in conjunction with independently performing at least one of a wear leveling function, a garbage collection function and a bit density setting function for the nonvolatile memory section of only that module based on one or more module input parameters.