# US 2014/0155014 A1 · Receiver iip2 analog calibration

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- Number: US 2014/0155014 A1
- Document ID: US20140155014A1
- Status: Published application
- Kind: A1
- Application number: 13/691,058
- Filed: 2012-11-30
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: QUALCOMM Incorporated
- Applicants: Qualcomm Incorporated
- Inventors: Lai Kan Leung; Gary John Ballantyne; Chiewcharn Narathong
- Web page: https://patentgrep.com/patent/US20140155014A1

## CPC

- H04B 1/16: Circuits
- H03D 7/1441: {using field-effect transistors (H03D7/145 takes precedence)}
- H03D 7/1458: {Double balanced arrangements, i.e. where both input signals are differential}
- H03D 7/1466: {Passive mixer arrangements}
- H03D 7/1491: {Arrangements to linearise a transconductance stage of a mixer arrangement}
- H03D 7/165: {at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature (combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002)}
- H03D 7/18: Modifications of frequency-changers for eliminating image frequencies {(H03D7/16 takes precedence)}
- H03D 2200/0041: Functional aspects of demodulators
- H03D 2200/0045: Calibration of demodulators
- H03D 2200/0088: Reduction of intermodulation, nonlinearities, adjacent channel interference; intercept points of harmonics or intermodulation products
- H04B: TRANSMISSION
- H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66)

## Abstract

Techniques for performing analog calibration of a receiver to optimize a second-order input intercept point (IIP2). In an aspect, a signal generator modeling an interferer is coupled to an adjustable input of a receiver, e.g., a gate bias voltage of a mixer. For example, the signal generator output may be a single-tone on-off keying (OOK) modulated signal. The mixer mixes the signal down to baseband, wherein an analog correlator correlates the down-converted signal with the known sequence of bits used to perform the OOK modulation. The analog correlation output is then provided to drive the bias voltage in the mixer, e.g., one or more gate voltages of transistors in the differential mixer, to optimize the overall receiver IIP2. Further aspects of the disclosure provide for calibrating receivers having multiple LNA's, and also dual or diversity receivers having multiple receive paths.

## Claims

### Claim 1

An apparatus comprising:
a signal generator configured to generate a modulated input signal comprising modulation data;
a receiver comprising a mixer configured to mix a signal derived from the modulated input signal with a local oscillator signal to generate a mixer output;
an analog multiplier configured to multiply an input signal with the modulation data; and
an analog integrator configured to integrate the output of the analog multiplier to generate an analog correlator output signal;
wherein an adjustable input of the receiver is coupled to the analog correlator output signal.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the adjustable input of the receiver comprises a bias voltage of the mixer.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the signal derived from the modulated input signal is the modulated input signal directly coupled to an input of the mixer.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the signal derived from the modulated input signal is the modulated input signal coupled to an input of a low-noise amplifier having an output coupled to an input of the mixer.

### Claim 5 (depends on 1)

The apparatus of claim 1, the analog multiplier comprising an amplifier having a differential output, a first terminal of the differential output coupled to a first switch, and the second terminal of the differential output coupled to a second switch, the first switch alternately switched on and off based on the modulation data, the second switch alternately switched on and off in a reverse manner from the first switch.

### Claim 6 (depends on 5)

The apparatus of claim 5, the first and second switches further coupled to the input of the analog integrator, wherein the analog integrator comprises an operational amplifier having at least one feedback-coupled integrating capacitor.

### Claim 7 (depends on 6)

The apparatus of claim 6, the analog integrator comprising a differential input comprising a positive terminal and a negative terminal, the positive terminal coupled to the output of the first switch, the negative terminal coupled to the output of the second switch, wherein the first terminal of the differential output of the analog multiplier amplifier is coupled to the negative terminal by a third switch, and the second terminal of the differential output of the analog multiplier amplifier is coupled to the positive terminal by a fourth switch, wherein the third switch is switched on and off in phase with the second switch, and the fourth switch is switched on and off in phase with the first switch.

### Claim 8 (depends on 7)

The apparatus of claim 7, the analog integrator further comprising a differential output, wherein the analog correlator output signal comprises the differential output of the analog integrator, wherein the adjustable input of the receiver comprises a differential bias voltage of the mixer, and wherein the differential output of the analog integrator is coupled to the differential bias voltage of the mixer.

### Claim 9 (depends on 7)

The apparatus of claim 7, the analog integrator further comprising a differential output, wherein the analog correlator output signal comprises the differential output of the analog integrator, wherein the adjustable input of the receiver comprises a differential bias voltage of a low-noise amplifier, and wherein the differential output of the analog integrator is coupled to the differential bias voltage of the low-noise amplifier.

### Claim 10 (depends on 7)

The apparatus of claim 7, wherein the output of the analog integrator is coupled to a bias voltage of the low-noise amplifier

### Claim 11 (depends on 5)

The apparatus of claim 5, the modulated input signal comprising an amplitude-modulated input signal, the amplitude modulation comprising on-off keying a single-tone carrier using the modulation data, and the modulation data comprises a sequence of alternating bits, wherein the analog multiplier may be disabled in an idle mode, and wherein the analog multiplier is configured to be in the idle mode when the modulation data turns off the single-tone carrier.

### Claim 12 (depends on 1)

The apparatus of claim 1, the modulated input signal comprising an amplitude-modulated input signal, the amplitude modulation comprising on-off keying a single-tone carrier using the modulation data, and the modulation data comprises a sequence of alternating bits.

### Claim 13 (depends on 1)

The apparatus of claim 1, the primary receiver comprising an in-phase (I) mixer, the primary receiver further comprising a quadrature (Q) mixer, wherein the adjustable input of the receiver comprises a gate bias voltage of the I and Q mixers, and wherein the analog correlator output signal is alternately coupled to the gate bias voltage of the I mixer and the Q mixer successively in time.

### Claim 14 (depends on 1)

The apparatus of claim 1, the mixer comprising an in-phase (I) mixer, the primary receiver further comprising a quadrature (Q) mixer, the analog correlator comprising a first analog correlator, the apparatus further comprising a second analog correlator configured to correlate the modulation data with a signal coupled to the output of the Q mixer, wherein an output of the first analog correlator is coupled to the gate bias voltage of the I mixer, and wherein an output of the second analog correlator is coupled to the gate bias voltage of the Q mixer.

### Claim 15 (depends on 1)

The apparatus of claim 1, further comprising:
an analog-to-digital converter for converting the analog correlator output signal to a digital signal;
a memory for storing the output of the analog-to-digital converter; and
a digital-to-analog converter for converting a stored value in the memory to an analog value; wherein the analog value is configurable to be coupled to the adjustable input of the receiver in lieu of the analog correlator output signal.

### Claim 16 (depends on 1)

The apparatus of claim 1, further comprising:
at least one balun;
a plurality of low-noise amplifiers (LNA's) having outputs coupled to the at least one balun to convert a single-ended signal to a differential signal;
wherein the input to the mixer is coupled to both the modulated input signal and the differential output signal of the at least one balun, and the plurality of LNA's are configurable to be selectively disabled.

### Claim 17 (depends on 16)

The apparatus of claim 16, wherein:
the at least one balun comprises a plurality of baluns, each balun coupled to a corresponding plurality of low-noise amplifiers;
the apparatus further comprising a mixer associated with each of the plurality of baluns, each of the inputs to the mixers being selectable from the modulated input signal or a differential output signal of the associated balun.

### Claim 18 (depends on 1)

The apparatus of claim 1, further comprising a secondary receiver, the secondary receiver comprising a receive processing chain for down-converting a radio-frequency signal, the receive processing chain comprising a low-pass filter, wherein:
in a calibration mode of the primary receiver, the analog multiplier and integrator of the analog correlator utilize components in the low-pass filter of the secondary receiver.

### Claim 19 (depends on 18)

The apparatus of claim 18, the low-pass filter of the secondary receiver comprising:
a first amplifier serial section comprising a feedback path having configurable resistance and configurable capacitance coupled in parallel, wherein the first amplifier serial section is configurable to disable the configurable capacitance, and the first amplifier serial section is further configurable to disable the configurable resistance;
a second amplifier serial section comprising a feedback path having configurable resistance and configurable capacitance coupled in parallel, wherein the second amplifier serial section is configurable to disable the configurable capacitance, and the second amplifier serial section is further configurable to disable the configurable resistance; wherein, when the primary receiver is in the calibration mode, the first amplifier serial section is configured to disable the configurable capacitance to implement the analog multiplier, and the second amplifier serial section is configured to disable the configurable resistance to implement the analog integrator.

### Claim 20

A method comprising:
generating modulated signal using modulation data;
coupling the modulated signal to a receiver input to generate a down-converted signal;
correlating the down-converted signal with the modulation data, the correlating comprising using an analog correlation block;
coupling the output of the correlating to an adjustable input of the receiver; and
storing at least one value of the adjustable input of the receiver causing a parameter of the receiver to be optimized.

### Claim 21 (depends on 20)

The method of claim 20, the adjustable input of the receiver comprising a gate bias voltage of a mixer of the receiver, and the parameter of the receiver comprising a second-order intercept point (IIP2), the generating the modulated signal comprising modulating with on-off keying (OOK) using the modulation data, and the coupling the modulated signal to the receiver input comprising directly coupling the modulated signal to the input of the mixer of the receiver.

### Claim 22

An apparatus comprising:
means for generating modulated signal using modulation data;
means for coupling the modulated signal to a receiver input to generate a down-converted signal;
means for correlating the down-converted signal with the modulation data;
means for coupling the output of the correlating to an adjustable input of the receiver; and
means for storing at least one value of the adjustable input of the receiver causing a parameter of the receiver to be optimized.

### Claim 23

A method comprising:
generating a modulated input signal comprising modulation data;
using a receiver, mixing a signal derived from the modulated input signal with a local oscillator signal to generate a mixer output;
multiplying an input signal with the modulation data;
integrating the output of the multiplying to generate an analog correlator output signal; and
coupling an adjustable input of the receiver to the analog correlator output signal.

### Claim 24 (depends on 23)

The method of claim 23, further comprising:
storing at least one value of the adjustable input of the receiver causing a parameter of the receiver to be optimized.

### Claim 25

An apparatus comprising:
means for generating a modulated input signal comprising modulation data;
means for, using a receiver, mixing a signal derived from the modulated input signal with a local oscillator signal to generate a mixer output;
means for multiplying an input signal with the modulation data;
means for integrating the output of the multiplying to generate an analog correlator output signal; and
means for coupling an adjustable input of the receiver to the analog correlator output signal.
