# US 2014/0153620 A1 · Use of multi-level modulation signaling for short reach data communications > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0153620 A1 - Document ID: US20140153620A1 - Status: Published application - Kind: A1 - Application number: 13/739,782 - Filed: 2013-01-11 - Published: 2014-06-05 - Earliest claimed: 2012-11-30 - Assignees: Broadcom Corporation - Inventors: Lorenzo Longo; Vivek Telang - Web page: https://patentgrep.com/patent/US20140153620A1 ## CPC - H04L 25/4917: {using multilevel codes} - H04L 25/03885: {adaptive} - H04L 27/02: Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation (H04L27/32 takes precedence) - H04L 25/03057: {with a recursive structure (H04L25/03031 takes precedence)} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A short reach communication system includes a plurality of communication SERDES that communicate data over a short reach channel medium such as a backplane connection (e.g., PCB trace) between, for example, chips located on a common PCB. A multi-level modulated data signal is generated to transmit/receive data over the short reach channel medium. Multi-level modulated data signals, such as four-level PAM, reduce the data signal rate therefore reducing insertion loss, power, complexity of the circuits and required chip real estate. ## Claims ### Claim 1 A high speed communication system comprising: a high speed SERDES comprising a transceiver; a multi-level modulated data signal transmitted or received over a communications channel medium by the transceiver; and wherein the multi-level modulated data signal reduces a data signaling rate of the high speed communication system. ### Claim 2 (depends on 1) A high speed communication system, as per claim 1, wherein the transceiver comprises at least a transmitter, the transmitter comprising a transmission pre-emphasizer and driver. ### Claim 3 (depends on 1) A high speed communication system, as per claim 1, wherein the transceiver comprises at least a receiver, the receiver comprising a continuous time linear equalizer (CTLE), slicer and clock and data recovery circuit (CDR). ### Claim 4 (depends on 3) A high speed communication system, as per claim 3, wherein the CTLE boosts high frequencies attenuated during transmission across the communications channel medium to constantly optimize performance, the slicer slices data signals output from the CTLE into at least four levels and the CDR optimizes phase and instantaneous sampling. ### Claim 5 (depends on 1) A high speed communication system, as per claim 1, wherein the high speed communication system is operative with the communications channel medium comprising any of, or a combination of: short trace PCB, backplane, copper wire, wireline and fiber. ### Claim 6 (depends on 1) A high speed communication system, as per claim 1, wherein the high speed communication system is operative in a short reach environment. ### Claim 7 (depends on 6) A high speed communication system, as per claim 6, wherein the short reach environment comprises a communication channel medium with insertion loss of 15 dB or less at 15 GHz. ### Claim 8 (depends on 1) A high speed communication system, as per claim 1, wherein the high speed communication system is operative in a 100 Gb/sec (25 Gb/sec×4) repeater used in 100 Gb/sec front-panel and backplane applications. ### Claim 9 (depends on 1) A high speed communication system, as per claim 1, wherein transmission using the multi-level modulated data signal reduces power by at least 50% over a 2-level NRZ data signaling. ### Claim 10 (depends on 1) A high speed communication system, as per claim 1, wherein transmission using the multi-level modulated data signal reduces SERDES chip area by at least 50% over a 2-level NRZ data signaling. ### Claim 11 A high speed communication system comprising: a plurality of high speed SERDES; a short reach communications channel medium connecting the plurality of high speed SERDES; and a transceiver operable with each of the plurality of high speed SERDES to transmit/receive four-level modulated data signals over the short reach communications channel medium. ### Claim 12 (depends on 11) A high speed communication system, as per claim 11, wherein transmission or receiving using the four-level modulated data signals reduces a data signaling rate of the high speed communication system. ### Claim 13 (depends on 12) A high speed communication system, as per claim 12, wherein the transceiver comprises at least a transmitter, the transmitter comprising a transmission pre-emphasizer and driver. ### Claim 14 (depends on 12) A high speed communication system, as per claim 12, wherein the transceiver comprises at least a receiver, the receiver comprising a continuous time linear equalizer (CTLE), slicer and clock and data recovery circuit (CDR). ### Claim 15 (depends on 14) A high speed communication system, as per claim 14, wherein the CTLE boosts high frequencies attenuated during transmission across the short reach communications channel medium to constantly optimize performance, the slicer slices data signals output from the CTLE into at least four levels and the CDR optimizes phase and instantaneous sampling. ### Claim 16 (depends on 11) A high speed communication system, as per claim 11, wherein the high speed communication system is operative with the short reach communications channel medium comprising any of, or a combination of: short trace PCB, backplane, copper wire, wireline and fiber. ### Claim 17 (depends on 11) A high speed communication system, as per claim 11, wherein the high speed communication system is operative in a 100 Gb/sec (25 Gb/sec×4) repeater used in 100 Gb/sec front-panel and backplane applications. ### Claim 18 (depends on 11) A high speed communication system, as per claim 11, wherein transmission using the four-level modulated data signal reduces power by at least 50% over a 2-level modulated data signaling. ### Claim 19 (depends on 11) A high speed communication system, as per claim 11, wherein transmission using the four-level modulated data signal reduces SERDES chip area by at least 50% over a 2-level modulated data signaling. ### Claim 20 A high speed short reach communication system comprising: a plurality of high speed SERDES, each of the plurality of high speed SERDES comprising a transmitter and receiver; a short reach communications channel medium connecting the plurality of high speed SERDES; and a multi-level pulse amplitude modulated (PAM) data signal transmitted or received by the plurality of high speed SERDES over the short reach communications channel medium.