# US 2014/0153619 A1 · Repartitioned transceiver using silicon-on-insulator

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- Number: US 2014/0153619 A1
- Document ID: US20140153619A1
- Status: Published application
- Kind: A1
- Application number: 13/718,378
- Filed: 2012-12-18
- Published: 2014-06-05
- Earliest claimed: 2012-12-03
- Assignees: Broadcom Corporation
- Applicants: Broadcom Corporation
- Inventors: Rahul Magoon; Michael (Meng-An) Pan; Ahmad Mirzaei; Mohyee Mikhemar
- Web page: https://patentgrep.com/patent/US20140153619A1

## CPC

- H04B 1/0458: {Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages (matching circuits in general H03H)}
- H03F 3/195: in integrated circuits
- H03F 3/245: {with semiconductor devices only}
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H03F 2203/45548: the IC comprising one or more capacitors as shunts to earth or as short circuit between inputs
- H04B: TRANSMISSION
- H03F: AMPLIFIERS

## Abstract

A transceiver circuit including a digital-to-analog converter, a filter coupled to the digital-to-analog converter, a passive mixer coupled to the filter, via a buffer and a multi-stage power amplifier coupled to the passive mixer via a passive amplifier. A transmitter and method for amplifying a RF signal for transmission are also provided.

## Claims

### Claim 1

A transceiver circuit comprising:
a digital-to-analog converter;
a filter coupled to the digital-to-analog converter;
a passive mixer coupled to the filter, via a buffer; and
a multi-stage power amplifier coupled to the passive mixer via a passive amplifier.

### Claim 2 (depends on 1)

The transceiver circuit of claim 1, wherein the passive mixer is implemented on a system-on-chip (SOC) die and the multi-stage power amplifier is implemented on a silicon-on-insulator (SOI) die.

### Claim 3 (depends on 2)

The transceiver circuit of claim 2, the SOC die and the SOI die are coupled via the passive amplifier.

### Claim 4 (depends on 1)

The transceiver circuit of claim 1, wherein an output impedance of the passive mixer is less than 50 ohms.

### Claim 5 (depends on 1)

The transceiver circuit of claim 1, wherein the passive amplifier comprises a series network, and wherein the series network comprises one or more inductors and one or more capacitors.

### Claim 6 (depends on 1)

The transceiver circuit of claim 1, wherein an output of the passive amplifier is tapped between an inductor and a capacitor, and
wherein the output of the passive amplifier is coupled to an input of the multi-stage power amplifier.

### Claim 7 (depends on 1)

The transceiver circuit of claim 1, wherein the passive amplifier is configured to operate as a low-pass filter.

### Claim 8 (depends on 1)

The transceiver circuit of claim 1, wherein the mixer is configured to modulate an in-phase signal.

### Claim 9 (depends on 1)

The transceiver circuit of claim 1, wherein the mixer is configured to modulate a quadrature phase signal.

### Claim 10 (depends on 1)

The transceiver circuit of claim 1, wherein an output of the multi-stage power amplifier is coupled to an antenna.

### Claim 11

A transmitter, comprising:
a digital-to-analog converter;
a filter coupled to the digital-to-analog converter;
a passive mixer coupled to the filter, via a buffer, wherein the buffer comprises an inverter-based feedback amplifier; and
a multi-stage power amplifier coupled to the passive mixer via a passive amplifier.

### Claim 12 (depends on 11)

The transmitter of claim 11, wherein the passive mixer is implemented on a system-on-chip (SOC) die and the multi-stage power amplifier is implemented on a silicon-on-insulator (SOI) die.

### Claim 13 (depends on 12)

The transmitter of claim 12, the SOC die and the SOI die are coupled via the passive amplifier.

### Claim 14 (depends on 11)

The transmitter of claim 11, wherein an output impedance of the passive mixer is less than 50 ohms.

### Claim 15 (depends on 11)

The transmitter of claim 11, wherein the passive amplifier comprises a series network, and wherein the series network comprises one or more inductors and one or more capacitors.

### Claim 16 (depends on 11)

The transmitter of claim 11, wherein an output of the passive amplifier is tapped between an inductor and a capacitor, and
wherein the output of the passive amplifier is coupled to an input of the multi-stage power amplifier.

### Claim 17 (depends on 11)

The transmitter of claim 11, wherein the passive amplifier is configured to operate as a low-pass filter.

### Claim 18

A method for amplifying a RF signal for transmission, comprising:
converting a digital signal into analog an analog signal, using a digital to analog converter;
filtering the analog signal, using a low-pass filter;
mixing, using one or more mixers, the analog signal with a local oscillator signal to produce a modulated RF signal; and
inputting the modulated RF signal to a passive amplifier, wherein an output of the passive amplifier is coupled to a multi-stage power amplifier via an interface.

### Claim 19 (depends on 18)

The method of claim 18, wherein the one or more mixers are implemented using system-on-chip (SOC) and the multi-stage power amplifier is implemented using silicon-on-insulator (SOI).

### Claim 20 (depends on 18)

The method of claim 18, wherein the interface has an impedance of less than 50 ohms.