# US 2014/0153350 A1 · Methods and apparatuses for refreshing memory > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0153350 A1 - Document ID: US20140153350A1 - Status: Published application - Kind: A1 - Application number: 13/693,865 - Filed: 2012-12-04 - Published: 2014-06-05 - Earliest claimed: 2012-12-04 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Aaron P. Boehm; Jeffrey P. Wright - Web page: https://patentgrep.com/patent/US20140153350A1 ## CPC - G11C 11/40615: {Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs} - G11C 11/406: Management or control of the refreshing or charge-regeneration cycles - G11C 11/40607: {Refresh operations in memory devices with an internal cache or data buffer} - G11C 11/40611: {External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh} - G11C 7/00: Arrangements for writing information into, or reading information out from, a digital store (G11C5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C11/4063, G11C11/413) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Apparatuses and methods for memory refreshing memory cells is described. An example method includes receiving a self refresh command at a memory. The method further includes refreshing the memory at a first refresh rate after receiving the self refresh command. The method further includes refreshing the memory at a second refresh rate in response to a determination that each memory cell of the memory has been refreshed at the first refresh rate. The first refresh rate is greater than a second refresh rate. ## Claims ### Claim 1 A method, comprising: receiving a self refresh command at a memory; refreshing the memory at a first refresh rate in response to receiving the self refresh command; and refreshing the memory at a second refresh rate in response to a determination that the memory has been refreshed at the first refresh rate, wherein the first refresh rate is greater than a second refresh rate. ### Claim 2 (depends on 1) The method of claim 1, further comprising determining that the memory has been refreshed at the first refresh rate in response to a count provided by a counter. ### Claim 3 (depends on 2) The method of claim 2, further comprising: initializing the count responsive to receiving the self refresh command, and wherein refreshing the memory at the first refresh rate comprises changing a count provided by the counter, wherein the count corresponds to an address of memory cells of the memory and wherein refreshing progresses through the memory as the count changes. ### Claim 4 (depends on 3) The method of claim 3, wherein initializing the count comprises storing a an initial count of the counter and wherein determining that each memory cell of the memory has been refreshed at the first refresh rate comprises comparing the initial count with a current count provided by the counter to detect a match. ### Claim 5 (depends on 3) The method of claim 3, wherein initializing the count comprises resetting a bit of the count, and wherein determining that the memory has been refreshed at the first refresh rate comprises detecting that the bit has a particular value. ### Claim 6 (depends on 5) The method of claim 5, wherein detecting that the bit has a particular value comprises detecting that a most significant bit of the count has the particular value. ### Claim 7 (depends on 1) The method of claim 1, further comprising determining that the memory has been refreshed at the first refresh rate in response to a timer. ### Claim 8 (depends on 7) The method of claim 7, further comprising: activating the timer in response to receiving the self refresh command; to being a time period. ### Claim 9 (depends on 8) The method of claim 8, wherein determining that the memory has been refreshed at the first refresh rate comprises detecting that the time period has expired. ### Claim 10 (depends on 7) The method of claim 7, wherein determining that the memory has been refreshed at the first refresh rate in response to a timer comprises detecting that a time period has expired. ### Claim 11 An method, comprising: receiving a self refresh command at a memory; initializing a count responsive to receiving the self refresh command; refreshing the memory at a first refresh rate responsive to receiving the self refresh command; changing a count provided by the counter corresponding to each iterative refresh of the memory; and refreshing the memory at a second refresh rate in response to the count indicating that the memory has been refreshed at the first refresh rate. ### Claim 12 (depends on 11) The method of claim 11, further comprising receiving, at the memory, a clock enable signal having a de-asserted value contemporaneously with receipt of the self refresh command. ### Claim 13 (depends on 11) The method of claim 11, wherein the first refresh rate is greater than the second refresh rate. ### Claim 14 (depends on 13) The method of claim 13, wherein the first refresh rate is twice as great as the second refresh rate. ### Claim 15 An apparatus comprising: a self refresh mode controller comprising: self refresh mode controller logic configured to receive a self refresh command, and configured to, in to response receipt of the self refresh command, provide refresh commands to provide memory cells of a memory to be refreshed at a first refresh rate during a first time period in which self refresh is enabled to cause the memory cells to be refreshed, and further configured to provide refresh commands at a second refresh rate during a second time period in which the self refresh is enabled. ### Claim 16 (depends on 15) The apparatus of claim 15, wherein the self refresh mode controller further comprises a counter configured to provide a refresh address count, wherein the first time period begins in response to receipt of the self refresh command and ends responsive to the refresh address count reaching a particular value. ### Claim 17 (depends on 15) The apparatus of claim 15, wherein the self refresh logic is further configured to receive a clock enable signal, wherein the second time period starts at an end of the first time period and ends in response to the clock enable signal having an asserted value. ### Claim 18 (depends on 15) The apparatus of claim 15, wherein the self refresh mode controller further comprises a timer, wherein the self refresh logic activates the timer in response to receipt of the self refresh command, wherein the first time period begins in response receipt of the self refresh command and ends in response to an indication that the timer has expired. ### Claim 19 An apparatus comprising: a memory array; and self refresh mode controller configured to receive a self refresh command, and configured to, in response to receipt of the self refresh command, provide refresh commands to the memory array at a first refresh rate, the self refresh mode controller further configured to provide refresh commands to the memory at a second refresh rate in response to a determination that all of the memory array has been refreshed at the first refresh rate. ### Claim 20 (depends on 19) The apparatus of claim 19, wherein the self refresh mode controller further comprises a counter, wherein the determination that the memory array has been refreshed at the first refresh rate is in response to a count provided by the counter. ### Claim 21 (depends on 20) The apparatus of claim 20, wherein the self refresh mode controller is further configured to initialize the count responsive to receiving the self refresh command and to change a count provided by the counter corresponding to providing each of the refresh commands at the first refresh rate. ### Claim 22 (depends on 19) The apparatus of claim 19, wherein the self refresh mode controller further comprises a timer, wherein the determination that the memory array has been refreshed at the first refresh rate is in response to an indication that a time period has expired. ### Claim 23 (depends on 19) The apparatus of claim 19, wherein the first refresh rate is based on a multiplier applied to the second refresh rate. ### Claim 24 (depends on 19) The apparatus of claim 19, wherein the multiplier is selectable.