# US 2014/0153343 A1 · Low voltage sensing scheme having reduced active power down standby current > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0153343 A1 - Document ID: US20140153343A1 - Status: Published application - Kind: A1 - Application number: 14/172,620 - Filed: 2014-02-04 - Published: 2014-06-05 - Earliest claimed: 2005-08-17 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Tae Kim - Web page: https://patentgrep.com/patent/US20140153343A1 ## CPC - G11C 7/08: Control thereof - G11C 5/148: {Details of power up or power down circuits, standby circuits or recovery circuits} - G11C 7/06: Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits} - G11C 7/062: {Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs} - G11C 7/065: {Differential amplifiers of latching type} - G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor} - G11C 7/12: Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines - G11C 7/22: Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management - G11C 11/4091: Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating - G11C 2207/065: Sense amplifier drivers - G11C 2207/2227: Standby or low power modes - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A low voltage sensing scheme reduces active power down standby leakage current in a memory device. A clamping device or diode is used between a Psense amplifier control line (e.g. ACT) and Vcc and/or between an Nsense amplifier control line (e.g. RNL*) and Vss (ground potential). The clamping diode is not enabled during normal memory operations, but is turned on during active power down mode to reduce leakage current through ACT and/or RNL* nodes. The clamping device connected to the ACT node may reduce the voltage on the ACT line during power down mode, whereas the clamping device connected to the RNL* node may increase the voltage on the RNL* line during power down mode to reduce sense amplifier leakage current through these nodes. Because of the rules governing abstracts, this abstract should not be used to construe the claims. ## Claims ### Claim 1 An apparatus, comprising: a first device; a second device; and a control circuit coupled to the first device and the second device, the control circuit configured to control the first device to provide a first voltage to a sense amplifier control line during a first mode of operation and to control the second device to provide a second voltage to the sense amplifier control line during a second mode of operation, wherein the second voltage is different than the first voltage. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the control circuit is configured to receive two signals and control the first and second devices responsive to respective states of the two signals. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the control circuit comprises a NAND gate and an inverter, and wherein the NAND gate receives the two signals. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the first device comprises an NMOS transistor coupled between a voltage source node and the sense amplifier control line, and wherein a gate of the NMOS transistor is coupled to the control circuit. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the first device comprises a PMOS transistor coupled between a voltage source node and the sense amplifier control line, wherein a gate of the PMOS transistor is coupled to the control circuit. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein first mode of operation is a normal mode of operation. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the second device comprises a voltage clamping device and is configured to clamp the voltage of the sense amplifier control line to the second voltage during an active power down mode of operation. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein the second device comprises a diode coupled transistor coupled to the sense amplifier control line. ### Claim 9 (depends on 7) The apparatus of claim 7, wherein the second voltage is less than the first voltage and the second device is configured to reduce the first voltage to provide the second voltage to the sense amplifier control line. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the first mode of operation is a normal mode of operation and the second mode of operation is an active power down mode of operation. ### Claim 11 A method, comprising: coupling a sense amplifier to first voltage during a normal mode of operation; and coupling the sense amplifier to a second voltage different from the first voltage during an active power down mode of operation to reduce standby leakage current. ### Claim 12 (depends on 11) The method of claim 11, wherein coupling the sense amplifier to a second voltage different from the first voltage during a second mode of operation comprises coupling a diode-connected transistor to a voltage source and the sense amplifier. ### Claim 13 (depends on 12) The method of claim 12, wherein the second voltage is approximately equal to the voltage source less a threshold voltage of the diode-connected transistor. ### Claim 14 (depends on 11) The method of claim 11, wherein coupling the sense amplifier to the second voltage different from the first voltage during an active power down mode of operation comprises coupling the sense amplifier to a lower voltage than the first voltage during the active power down mode of operation. ### Claim 15 (depends on 11) The method of claim 11, wherein coupling the sense amplifier to the second voltage different from the first voltage during an active power down mode of operation comprises coupling the sense amplifier to a higher voltage than the first voltage during the active power down mode of operation. ### Claim 16 An apparatus comprising: a sense amplifier control circuit configured to couple a sense amplifier control line to a first voltage during a first mode of operation and to couple the control line to a second voltage during a second mode of operation. ### Claim 17 (depends on 16) The apparatus of claim 16, further comprising a first circuit configured to couple the sense amplifier control line to the first voltage responsive to a first control signal of the sense amplifier control circuit. ### Claim 18 (depends on 17) The apparatus of claim 17, wherein the first circuit comprises a transistor coupled between a voltage source node and the sense amplifier control line, and wherein the first circuit couples the sense amplifier control line to the voltage source node responsive to the first control signal. ### Claim 19 (depends on 17) The apparatus of claim 17, further comprising a second circuit configured to couple the sense amplifier control line to the second voltage responsive to a second control signal of the sense amplifier control circuit, wherein the second voltage is different than the first voltage. ### Claim 20 (depends on 19) The apparatus of claim 19, wherein the second circuit comprises three series-coupled transistors coupled between a voltage source node and the sense amplifier control line, and wherein the three series-coupled transistors couple the sense amplifier control line to the voltage source node responsive to the second control signal. ### Claim 21 (depends on 20) The apparatus of claim 20, wherein the three series-coupled transistors comprise a first transistor having a gate coupled to a third control signal of the sense amplifier control circuit, a second transistor having a gate coupled to the second control signal, and a third transistor in a diode-connected configuration.