# US 2014/0153333 A1 · Systems and Methods to Avoid False Verify and False Read

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- Number: US 2014/0153333 A1
- Document ID: US20140153333A1
- Status: Published application
- Kind: A1
- Application number: 13/801,655
- Filed: 2013-03-13
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: SanDisk Technologies LLC
- Applicants: Sandisk Technologies Inc.
- Inventors: Chris Nga Yee Avila; Yingda Dong; Man Lung Mui
- Web page: https://patentgrep.com/patent/US20140153333A1

## CPC

- G11C 16/3445: {Circuits or methods to verify correct erasure of nonvolatile memory cells}
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

In a nonvolatile NAND memory array, a NAND block may be falsely determined to be in an erased condition because of the effect of unwritten cells prior to the erase operation. Such cells may be programmed with dummy data prior to erase, or parameters used for a verify operation may be modified to compensate for such cells. Read operations may be similarly modified to compensate for unwritten cells.

## Claims

### Claim 1

A method of performing an adaptive erase verification during erase of a block in a NAND memory, comprising:
determining an amount of unwritten space remaining in the block;
if the amount of unwritten space is less than a predetermined amount then performing erase verification using a default set of verification parameters; and
if the amount of unwritten space exceeds the predetermined amount then performing erase verification using a modified set of verification parameters that is different to the default set of erase parameters.

### Claim 2 (depends on 1)

The method of claim 1 wherein the modified set of verification parameters is selected from a plurality of sets of modified verification parameters according to the amount of unwritten space.

### Claim 3 (depends on 1)

The method of claim 1 wherein the amount of unwritten space is determined from a write pointer.

### Claim 4 (depends on 3)

The method of claim 3 wherein the write pointer is maintained by a memory controller that is connected to the NAND memory.

### Claim 5 (depends on 1)

The method of claim 1 wherein the amount of unwritten space is determined from a binary search of memory cells of the block.

### Claim 6 (depends on 5)

The method of claim 5 wherein the binary search is performed by logic circuits that are on the same integrated circuit chip as the NAND memory.

### Claim 7

A method of performing an adaptive read of a portion of data in a block in a NAND memory, comprising:
determining an amount of unwritten space remaining in the block;
if the amount of unwritten space is less than a predetermined amount then performing the read of the portion of data using a first set of read parameters; and
if the amount of unwritten space exceeds the predetermined amount then performing the read of the portion of data using a second set of read parameters that is different to the first set of read parameters.

### Claim 8 (depends on 7)

The method of claim 7 wherein the second set of read parameters is selected from a plurality of sets of read parameters according to the amount of unwritten space.

### Claim 9 (depends on 7)

The method of claim 7 further comprising, prior to determining the amount of unwritten space remaining in the block, performing an initial read of the portion of data and performing Error Correction Code (ECC) analysis of the portion of data that indicates that the portion of data is uncorrectable.

### Claim 10 (depends on 9)

The method of claim 9 wherein the initial read is performed using a default set of read parameters that is different to the first set of read parameters and the second set of read parameters.

### Claim 11 (depends on 7)

The method of claim 7 wherein the amount of unwritten space remaining in the block is determined on-chip by a binary search of word lines of the NAND memory.

### Claim 12 (depends on 7)

The method of claim 7 wherein the amount of unwritten space remaining in the block is determined from a write pointer that is maintained by a memory controller.

### Claim 13

A method of operating a NAND memory comprising:
identifying a block as being in condition for an erase operation;
determining whether a number of unwritten memory cells in the block exceeds a predetermined number;
subsequently, if the number of unwritten memory cells in the block exceeds the predetermined number, performing an unverified write operation that raises threshold voltages of unwritten memory cells from an unwritten state; and
subsequently performing the erase operation.

### Claim 14 (depends on 13)

The method of claim 13 wherein the determination is made based on a write pointer that is maintained by a memory controller, the NAND memory located on a first integrated circuit chip and the memory controller located on a second integrated circuit chip.

### Claim 15 (depends on 13)

The method of claim 13 wherein the determination is made based on a binary search of rows of memory cells in the block that is performed by peripheral circuits on the same integrated circuit chip as the NAND memory.

### Claim 16 (depends on 13)

The method of claim 13 wherein the unverified write operation raises threshold voltages of the unwritten memory cells to a threshold voltage level corresponding to written data.

### Claim 17 (depends on 13)

The method of claim 13 wherein the threshold voltages of all unwritten memory cells in the block are raised by the unverified write operation.

### Claim 18 (depends on 13)

The method of claim 13 wherein the threshold voltages of only a subset of all unwritten memory cells in the block are raised by the unverified write operation, the subset including a sufficient number of cells to reduce the number of unwritten memory cells in the block below the predetermined number when the unverified write is performed on the subset alone.