# US 2014/0152479 A1 · Digital to analog converters with adjustable output resolution > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0152479 A1 - Document ID: US20140152479A1 - Status: Published application - Kind: A1 - Application number: 13/705,924 - Filed: 2012-12-05 - Published: 2014-06-05 - Earliest claimed: 2012-12-05 - Assignees: Maxim Integrated Products, Inc. - Inventors: Matthew Felder - Web page: https://patentgrep.com/patent/US20140152479A1 ## CPC - H03M 1/742: {using current sources as quantisation value generators} - H03M 1/661: {Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal, e.g. by interpolation, by curve-fitting, by smoothing} - H03M 1/745: {with weighted currents} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A digital to analog converter (DAC) includes: first and second nodes; a first switching device; a second switching device; and a switch control module. The switch control module selectively configures the first and second switching devices such that: in a first configuration, the first switching device connects a first current to the first node and the second switching device connects a second current to the second node; in a second configuration, the first switching device connects the first current to the second node and the second switching device connects the second current to the first node; and in a third configuration, the first and second switching devices disconnect the first current and the second current from the first and second nodes. ## Claims ### Claim 1 A digital to analog converter (DAC) comprising: first and second nodes; a first switching device; a second switching device; and a switch control module that: based on a first set of one or two binary bits, configures the first and second switching devices such that the first switching device connects a first current to the first node and the second switching device connects a second current to the second node; based on a second set of one or two binary bits, configures the first and second switching devices such that the first switching device connects the first current to the second node and the second switching device connects the second current to the first node; and based on a third set of one or two binary bits, configures the first and second switching devices such that the first and second switching devices disconnect the first current and the second current from the first and second nodes. ### Claim 2 (depends on 1) The DAC of claim 1 further comprising: a third switching device; a fourth switching device; and a second switch control module that: selectively configures the third and fourth switching devices such that the third switching device connects a third current to the first node and the fourth switching device connects a fourth current to the second node; selectively configures the third and fourth switching devices such that the third switching device connects the third current to the second node and the fourth switching device connects the fourth current to the first node; and selectively configures the third and fourth switching devices such that the third and fourth switching devices disconnect the third and fourth currents from the first and second nodes. ### Claim 3 (depends on 1) The DAC of claim 1 further comprising at least one of: a tap current module that generates the first current based on a first reference voltage; and a sink current module that generates the second current based on a second reference voltage. ### Claim 4 (depends on 3) The DAC of claim 3 wherein the first and second currents are substantially equal in magnitude and opposite in polarity. ### Claim 5 (depends on 3) The DAC of claim 3 further comprising: a current source reference generator module that generates the first reference voltage based on a target current; a current sink reference generator module that generates the second reference voltage based on the target current; and a conversion control module that sets the target current based on a digital signal input to the DAC. ### Claim 6 (depends on 5) The DAC of claim 5 wherein the conversion control module sets the target current to a first predetermined current when the digital signal is a 1 bit signal and sets the target current to a second predetermined current in response to a determination that the digital signal is a 1.5 bit signal. ### Claim 7 (depends on 6) The DAC of claim 6 wherein the conversion control module determines that the digital signal is a 1.5 bit signal in response to a determination that the digital signal includes a predetermined pattern of binary bits. ### Claim 8 (depends on 6) The DAC of claim 6 wherein the second predetermined current is less than the first predetermined current. ### Claim 9 (depends on 1) A system, comprising: the DAC of claim 1; a differential amplifier that includes a first input that is connected to the first node, that includes a second input that is connected to the second node, and that includes first and second outputs; a first resistance that is connected between the first input and the first output; and a second resistance that is connected between the second input and the second output. ### Claim 10 (depends on 9) The system of claim 9 further comprising a conversion control module that selectively varies the first and second resistances based on a digital signal input to the DAC. ### Claim 11 (depends on 10) The system of claim 10 wherein the conversion control module sets the first and second resistances to a first predetermined value when the digital signal is a 1 bit signal and sets the first and second resistances to a second predetermined value in response to a determination that the digital signal is a 1.5 bit signal. ### Claim 12 (depends on 11) The system of claim 11 wherein the second predetermined value is less than the first predetermined value. ### Claim 13 A digital to analog converter (DAC) comprising: first and second nodes; a first switching device that receives a first current at a first terminal and that is connected to the second node at a second terminal; a second switching device that is connected to a second current at a first terminal and that is connected to the second node at a second terminal; a third switching device that receives the first current at a first terminal and that is connected to the first node at a second terminal; a fourth switching device that is connected to the second current at a first terminal and that is connected to the first node at a second terminal; a fifth switching device that receives the first current at a first terminal; a sixth switching device that is connected at a second terminal to a second terminal of the fifth switching device and that is connected to the second current at a first terminal; and a switch control module that, based on first and second bits of binary data: generates a first signal that is applied to control terminals of the first and fourth switching devices; generates a second signal that is applied to control terminals of the second and third switching devices; and generates a third signal that is applied to control terminals of the fifth and sixth switching devices. ### Claim 14 (depends on 13) The DAC of claim 13 further comprising: a seventh switching device that receives a third current at a first terminal and that is connected to the second node at a second terminal; an eighth switching device that is connected to a fourth current at a first terminal and that is connected to the second node at a second terminal; a ninth switching device that receives the third current at a first terminal and that is connected to the first node at a second terminal; a tenth switching device that is connected to the fourth current at a first terminal and that is connected to the first node at a second terminal; an eleventh switching device that receives the third current at a first terminal; a twelfth switching device that is connected at a second terminal to a second terminal of the eleventh switching device and that is connected to the fourth sink at a first terminal; and a second switch control module that, based on third and fourth bits of binary data: generates a fourth signal that is applied to control terminals of the seventh and tenth switching devices; generates a fifth signal that is applied to control terminals of the eighth and ninth switching devices; and generates a sixth signal that is applied to control terminals of the eleventh and twelfth switching devices. ### Claim 15 (depends on 14) The DAC of claim 14 wherein: the switch control module includes a first flip flop, a second flip flop, and a first logic gate that generate the first, second, and third signals; and the second switch control module includes a third flip flop, a fourth flip flop, and a second logic gate that generate the fourth, fifth, and sixth signals. ### Claim 16 (depends on 15) The DAC of claim 15 wherein: an input of the third flip flop is connected to an output of a first one of the first and second flip flops; an input of the fourth flip flop is connected to an output of a second one of the first and second flip flops; and the first and second ones are different. ### Claim 17 (depends on 13) The DAC of claim 13 wherein the first, second, third, fourth, fifth, and sixth switching devices are metal-oxide semiconductor field-effect transistors (MOSFETs). ### Claim 18 (depends on 13) A system, comprising: the DAC of claim 13; a differential amplifier that includes a first input that is connected to the first node, that includes a second input that is connected to the second node, and that includes first and second outputs; a first resistance that is connected between the first input and the first output; and a second resistance that is connected between the second input and the second output. ### Claim 19 (depends on 18) The system of claim 18 further comprising a conversion control module that sets the first and second resistances to a first predetermined value when a digital signal input to the DAC is a 1 bit signal and that sets the first and second resistances to a second predetermined value in response to a determination that the digital signal is a 1.5 bit signal. ### Claim 20 (depends on 13) A system, comprising: the DAC of claim 13; a tap current module that generates the first current based on a first reference voltage; a sink current module that generates the second current based on a second reference voltage; a current source reference generator module that generates the first reference voltage based on a target current; a current sink reference generator module that generates the second reference voltage based on the target current; and a conversion control module that sets the target current to a first predetermined current when a digital signal input to the DAC is a 1 bit signal and sets the target current to a second predetermined current in response to a determination that the digital signal is a 1.5 bit signal.