# US 2014/0152367 A1 · Noise filtering circuit and operating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0152367 A1 - Document ID: US20140152367A1 - Status: Published application - Kind: A1 - Application number: 13/774,634 - Filed: 2013-02-22 - Published: 2014-06-05 - Earliest claimed: 2012-12-05 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Samsung Electro-Mechanics Co., Ltd. - Inventors: Sung Man PANG; Chang Jae HEO - Web page: https://patentgrep.com/patent/US20140152367A1 ## CPC - H03K 5/1252: Suppression or limitation of noise or interference (specially adapted for transmission systems H04B15/00, H04L25/08) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract There are provided a noise filter circuit and an operating method thereof. A noise filter circuit includes a first delay circuit, and a second delay circuit connected to the first delay circuit in series, wherein the first delay circuit and the second delay circuit each include at least one inverter and at least one delay element for generating a predetermined delay, and the first delay circuit and the second delay circuit have different filtering characteristics. ## Claims ### Claim 1 A noise filter circuit, comprising: a first delay circuit; and a second delay circuit connected to the first delay circuit in series, wherein the first delay circuit and the second delay circuit re each include at least one inverter and at least one delay element for generating a predetermined delay, and the first delay circuit and the second delay circuit have different filtering characteristics. ### Claim 2 (depends on 1) The noise filter circuit of claim 1, wherein the first delay circuit filters noise occurring while an input signal is turned-on from a low level to a high level, and the second delay circuit filters the noise occurring while the input signal is turned-off from a high level to a low level. ### Claim 3 (depends on 1) The noise filter circuit of claim 1, wherein the first delay circuit filters as the noise the input signal turned-on from a low level to a high level for a predetermined reference time or less, and the second delay circuit filters as the noise the input signal turned-off from a high level to a low level for the predetermined reference time or less. ### Claim 4 (depends on 1) The noise filter circuit of claim 1, wherein the at least one delay element includes at least one capacitor and a charge supply source charging charges in the capacitor. ### Claim 5 (depends on 4) The noise filter circuit of claim 4, wherein the capacitor included in the first delay circuit has a discharging time shorter than a charging time and the capacitor included in the second delay circuit has a charging time shorter than a discharging time. ### Claim 6 (depends on 4) The noise filter circuit of claim 4, wherein the charge supply source includes at least one switching unit and an operation of the switching unit is controlled by inverse signals of the input signals that are input to the first delay circuit and the second delay circuit, respectively. ### Claim 7 (depends on 1) The noise filter circuit of claim 1, wherein the first delay circuit and the second delay circuit have the same circuit structure. ### Claim 8 An operating method of a noise filter circuit, comprising: receiving an input signal; charging charges in a capacitor when a level of the input signal is changed from a low level to a high level; and determining a signal output from an inverter connected to the capacitor, based on a first time during which the input signal is maintained at a high level and a second time required to change the voltage of the capacitor, to a threshold voltage of an inverter connected to the capacitor. ### Claim 9 (depends on 8) The operating method of claim 8, wherein in the determining, the level of the signal output from the inverter connected to the capacitor is determined as having a low level when the first time is shorter than the second time. ### Claim 10 (depends on 8) The operating method of claim 8, wherein in the determining, the level of the signal output from the inverter connected to the capacitor is determined as having a high level when the first time is longer than the second time. ### Claim 11 (depends on 8) The operating method of claim 8, further comprising generating a final output signal by inverting the level of the signal output from the inverter connected to the capacitor. ### Claim 12 An operating method of a noise filter circuit, comprising: receiving an input signal; inverting the input signal to generate a first signal; and determining a level of a signal output from an inverter connected to the capacitor, based on a first time during which the first signal is maintained at a high level and a second time required to change the voltage of the capacitor of which the charging or the discharging is determined by the first signal, to a threshold voltage of an inverter connected to the capacitor. ### Claim 13 (depends on 12) The operating method of claim 12, wherein in the determining, the level of the signal output from the inverter is determined as having a high level when the first time is shorter than the second time. ### Claim 14 (depends on 12) The operating method of claim 12, wherein in the determining, the level of the signal output from the inverter is determined as having a low level when the first time is longer than the second time. ### Claim 15 (depends on 12) The operating method of claim 12, wherein the generating of the first signal includes: discharging charges charged in an input stage capacitor connected to a switching unit operated by the input signal when the input signal is changed from a high level to a low level; charging charges in the input stage capacitor when the input signal is re-changed from a low level to a high level; and generating the first signal from the voltage of the input stage capacitor.