# US 2014/0152282 A1 · Switching power supply device and a semiconductor integrated circuit

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- Number: US 2014/0152282 A1
- Document ID: US20140152282A1
- Status: Published application
- Kind: A1
- Application number: 14/084,590
- Filed: 2013-11-19
- Published: 2014-06-05
- Earliest claimed: 2004-01-28
- Assignees: Renesas Electronics Corporation
- Applicants: Renesas Electronics Corporation
- Inventors: Kyoichi HOSOKAWA; Ryotaro KUDO; Toshio NAGASAWA; Koji TATENO
- Web page: https://patentgrep.com/patent/US20140152282A1

## CPC

- H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)}
- H02M 7/538: in a push-pull configuration (H02M7/5375 takes precedence {; with oscillating arrangements H02M7/53832, H02M7/53846})
- H03F 3/217: Class D power amplifiers; Switching amplifiers
- H03K 17/063: {in field-effect transistor switches}
- H03K 17/687: the devices being field-effect transistors
- G05F 1/44: semiconductor devices only
- H03F 2200/351: Pulse width modulation being used in an amplifying circuit
- H03F 2200/78: A comparator being used in a controlling circuit of an amplifier
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H03F: AMPLIFIERS
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

In a switching power source which controls a current which flows in an inductor through a switching element which performs a switching operation in response to a PWM signal, and forms an output voltage by a capacitor which is provided in series in the inductor, a booster circuit which is constituted of a bootstrap capacity and a MOSFET is provided between an output node of the switching element and a predetermined voltage terminal. The boosted voltage is used as an operational voltage of a driving circuit of the switching element, another source/drain region and a substrate gate are connected with each other, and a junction diode between one source/drain region and the substrate gate is inversely directed with respect to the boosted voltage which is formed by the bootstrap capacity.

## Claims

### Claim at position 1

1-26. (canceled)

### Claim 27

A regulator comprising:
an inductor having a first end and a second end;
an output capacitor coupled to the second end of the inductor;
a boost capacitor; and
a semiconductor device comprising:
an input voltage terminal;
an output terminal coupled to the first end of the inductor;
a ground potential terminal;
a power terminal;
a first terminal coupled to the output terminal via the boost capacitor;
a first MOSFET having a source-drain path coupled between the input voltage terminal and the output terminal and a gate;
a second MOSFET having a source-drain path coupled between the output terminal and the ground potential terminal and a gate;
a control circuit coupled to the power terminal, coupled to provide a first control signal to the gate of the first MOSFET and coupled to provide a second control signal to the gate of the second MOSFET; and
a P-channel switch MOSFET having a source-drain path coupled between the power terminal and the first terminal, a source thereof being coupled to a back gate thereof and to the first terminal, and a drain thereof being coupled to the power terminal.

### Claim 28 (depends on 27)

A regulator according to claim 27,
wherein the first MOSFET and the second MOSFET are N-channel MOSFETs,
wherein the source region of the first MOSFET is coupled to the drain region of the second MOSFET.

### Claim 29 (depends on 27)

A regulator according to claim 27, further comprising:
a pulse width modulation circuit which provides pulse width modulation signals as the first control signal and the second control signal.

### Claim 30 (depends on 27)

A regulator according to claim 27,
wherein an amplitude of the first control signal is larger than a voltage applied to the power terminal.

### Claim 31 (depends on 27)

A regulator according to claim 27,
wherein a voltage from the power terminal is lower than a voltage supplied to the input voltage terminal.

### Claim 32 (depends on 27)

A regulator e according to claim 27, wherein:
the first MOSFET is included in a first semiconductor chip;
the second MOSFET is included in a second semiconductor chip; and
the control circuit and the P-channel switch MOSFET are included in a third semiconductor chip.