# US 2014/0152279 A1 · Circuit to Control the Effect of Dielectric Absorption in Dynamic Voltage Scaling Low Dropout Regulator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0152279 A1 - Document ID: US20140152279A1 - Status: Published application - Kind: A1 - Application number: 13/692,438 - Filed: 2012-12-03 - Published: 2014-06-05 - Earliest claimed: 2012-12-03 - Assignees: Dialog Semiconductor GmbH - Applicants: Dialog Semiconductor GmbH - Inventors: Rupert Howes - Web page: https://patentgrep.com/patent/US20140152279A1 ## CPC - G05F 1/10: Regulating voltage or current (G05F1/02 takes precedence) - G05F 1/46: wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A circuit and method provides compensation for disturbance of an output voltage caused by dielectric absorption of a load capacitor of a low dropout voltage regulator after a modification of the output voltage level of the low dropout voltage regulator. A dielectric absorption current compensation circuit generates a profile current that is applied to an output of the low dropout voltage regulator and in parallel with the load capacitor to compensate for the dielectric absorption current. The dielectric absorption current compensation circuit has a programmable profile current generator that generates the profile current. A switchable current mirror transfers a mirror profile compensation current to the load capacitor to compensate for the dielectric absorption current. In some embodiments, the profile current is a continuous profile dielectric absorption compensation current and in other embodiments, the profile current is a digital profile dielectric absorption compensation current. ## Claims ### Claim 1 A dielectric absorption current compensation circuit for generating a profile compensation current that is applied to an output of the low dropout voltage regulator and in parallel with a load capacitor to compensate for the dielectric absorption current comprising: a profile current generator that generates the profile compensation current and in communication with the output of the low dropout voltage regulator for transferring the profile compensation current to the load capacitor to compensate for the dielectric absorption current. ### Claim 2 (depends on 1) The dielectric absorption current compensation circuit of claim 1 wherein the dielectric absorption current compensation circuit is an analog dielectric absorption current compensation circuit providing an analog profile compensation current mirroring the dielectric absorption current or a digital dielectric absorption current compensation circuit providing a digital profile compensation current having discrete levels approximately mirroring the dielectric absorption current. ### Claim 3 (depends on 2) The dielectric absorption current compensation circuit of claim 2 wherein the profile current generator of the analog dielectric absorption current compensation circuit comprises: a first switch with a first terminal connected to an output of the programmable current source and a second terminal; a diode-connected transistor having a commonly connected drain and gate connected to the second terminal of the first switch; a ballast timing capacitor having a first plate connected to the drain and gate of the diode-connected transistor and a second plate connected to the ground reference voltage source for controlling the profile of the profile compensation current within the dielectric absorption compensation circuit; a second switch having a first terminal connected to the commonly connected drain and gate of the diode-connected transistor and second terminal; a second transistor having a gate connected to the second terminal of the second switch, a drain connected to an output of the low dropout regulator and in parallel with the output capacitor of the low dropout regulator; and a third switch having a first terminal connected to the gate of the second transistor and the second terminal of the second switch and a second terminal connected to the ground reference voltage source; wherein when the output of the low dropout regulator is disabled and the output voltage level is placed at a lower voltage level and the voltage across the output capacitor of the low dropout voltage regulator will begin to recharge and the output voltage will begin to rise, the second switch will activate and the first and third switches will deactivate, the ballast timing capacitor will discharge through the diode-connected transistor to cause the second transistor to source the profile compensation current with a magnitude that matches the current generated as the output capacitor recharges to the output of the low dropout regulator to counteract the current generated by the recharging of the output capacitor. ### Claim 4 (depends on 3) The dielectric absorption current compensation circuit of claim 3 wherein when the low dropout regulator is at a steady state the first switch is activated to close the connection from the profile current source to the diode-connected transistor, the second switch is deactivated to disconnect the gate of the second transistor from the drain and gate of the diode-connected transistor, and the third switch is activated to connect the gate of the second transistor to the ground reference voltage source. ### Claim 5 (depends on 2) The dielectric absorption current compensation circuit of claim 2 wherein the profile current generator of the digital dielectric absorption current compensation circuit comprises: a digital-to-analog circuit receive a plurality of data bits and generating the digital profile compensation current wherein each data bit represents a current level such that all the current levels are summed together based on a data state of applied to the data bits. ### Claim 6 (depends on 5) The dielectric absorption current compensation circuit of claim 5 wherein the digital-to-analog circuit comprises: a plurality of switching transistors connected such that a gate of each of the switching transistors received one of the plurality of data bits, the sources of the switching transistors are commonly connected to a ground reference voltage source; a plurality of current determining resistors, wherein a drain of each of the plurality of switching transistors is connected to a first terminal of one of the plurality of current determining resistors and second terminals of the current determining resistors are commonly connected to the output of the low dropout voltage regulator for transferring the digital profile compensation current to the load capacitor to compensate for the dielectric absorption current. ### Claim 7 (depends on 6) The dielectric absorption current compensation circuit of claim 6 wherein when all of the data bits are at a first data state all of the plurality of switching transistors are turned on and the digital profile compensation current is a maximum current level. ### Claim 8 (depends on 7) The dielectric absorption current compensation circuit of claim 7 wherein when all of the data bits are at a second data state all of the plurality of switching transistors are turned off and the digital profile compensation current is a zero current level. ### Claim 9 (depends on 8) The dielectric absorption current compensation circuit of claim 8 wherein when any of the data bits are at a first data state those of the plurality of switching transistors with gates at the first data state are turned on, those of the plurality of switching transistors with gates at the second data state are turned off, and the digital profile compensation current is a current level equal to the sum of the current through each of those of the plurality of switching transistors with gates at the first data state and turned on. ### Claim 10 (depends on 8) The dielectric absorption current compensation circuit of claim 8 wherein digital profile compensation current is formed by selectively setting the data bits to the first data state to approximate the dielectric absorption current. ### Claim 11 A low dropout voltage regulator comprises: a dielectric absorption current compensation circuit for generating a profile compensation current that is applied to an output of the low dropout voltage regulator and in parallel with a load capacitor to compensate for the dielectric absorption current comprising: a profile current generator that generates the profile compensation current and in communication with the output of the low dropout voltage regulator for transferring the profile compensation current to the load capacitor to compensate for the dielectric absorption current. ### Claim 12 (depends on 11) The low dropout voltage regulator of claim 11 wherein the dielectric absorption current compensation circuit is an analog dielectric absorption current compensation circuit providing an analog profile compensation current mirroring the dielectric absorption current or a digital dielectric absorption current compensation circuit providing a digital profile compensation current having discrete levels approximately mirroring the dielectric absorption current. ### Claim 13 (depends on 12) The low dropout voltage regulator of claim 12 wherein the profile current generator of the analog dielectric absorption current compensation circuit comprises: a first switch with a first terminal connected to an output of the programmable current source and a second terminal; a diode-connected transistor having a commonly connected drain and gate connected to the second terminal of the first switch; a ballast timing capacitor having a first plate connected to the drain and gate of the diode-connected transistor and a second plate connected to the ground reference voltage source for controlling the profile of the profile compensation current within the dielectric absorption compensation circuit; a second switch having a first terminal connected to the commonly connected drain and gate of the diode-connected transistor and second terminal; a second transistor having a gate connected to the second terminal of the second switch, a drain connected to an output of the low dropout regulator and in parallel with the output capacitor of the low dropout regulator; and a third switch having a first terminal connected to the gate of the second transistor and the second terminal of the second switch and a second terminal connected to the ground reference voltage source; wherein when the output of the low dropout regulator is disabled and the output voltage level is placed at a lower voltage level and the voltage across the output capacitor of the low dropout voltage regulator will begin to recharge and the output voltage will begin to rise, the second switch will activate and the first and third switches will deactivate, the ballast timing capacitor will discharge through the diode-connected transistor to cause the second transistor to source the profile compensation current with a magnitude that matches the current generated at the output capacitor recharges to the output of the low dropout regulator to counteract the current generated by the recharging of the output capacitor. ### Claim 14 (depends on 12) The low dropout voltage regulator of claim 12 wherein when the low dropout regulator is in a steady state the first switch is activated to close the connection from the profile current source to the diode-connected transistor, the second switch is deactivated to disconnect the gate of the second transistor from the drain and gate of the diode-connected transistor, and the third switch is activated to connect the gate of the second transistor to the ground reference voltage source. ### Claim 15 (depends on 12) The low dropout voltage regulator of claim 12 wherein the profile current generator of the digital dielectric absorption current compensation circuit comprises: a digital-to-analog circuit receive a plurality of data bits and generating the digital profile compensation current wherein each data bit represents a current level such that all the current levels are summed together based on a data state of applied to the data bits. ### Claim 16 (depends on 15) The low dropout voltage regulator of claim 15 wherein the digital-to-analog circuit comprises: a plurality of switching transistors connected such that a gate of each of the switching transistors receives one of the plurality of data bits, the sources of the switching transistors are commonly connected to a ground reference voltage source; a plurality of current determining resistors, wherein a drain of each of the plurality of switching transistors is connected to a first terminal of one of the plurality of current determining resistors and second terminals of the current determining resistors are commonly connected to the output of the low dropout voltage regulator for transferring the digital profile compensation current to the load capacitor to compensate for the dielectric absorption current. ### Claim 17 (depends on 16) The low dropout voltage regulator of claim 16 wherein when all of the data bits are at a first data state all of the plurality of switching transistors are turned on and the digital profile compensation current is a maximum current level. ### Claim 18 (depends on 17) The low dropout voltage regulator of claim 17 wherein when all of the data bits are at a second data state all of the plurality of switching transistors are turned off and the digital profile compensation current is a zero current level. ### Claim 19 (depends on 18) The low dropout voltage regulator of claim 18 wherein when any of the data bits are at a first data state those of the plurality of switching transistors with gates at the first data state are turned on, those of the plurality of switching transistors with gates at the second data state are turned off, and the digital profile compensation current is a current level equal to the sum of the current through each of those of the plurality of switching transistors with gates at the first data state and turned on. ### Claim 20 (depends on 19) The low dropout voltage regulator of claim 19 wherein digital profile compensation current is formed by selectively setting the data bits to the first data state to approximate the dielectric absorption current. ### Claim 21 A method for compensating for the dielectric absorption current from the recharging of the output load capacitor of a low dropout voltage regulator comprising the steps of: requesting the low voltage regulator to decrease its output voltage; enabling an internal load current source to decrease the output voltage of the low dropout voltage regulator by adjusting the charge of the output load capacitor; ramping down an output voltage level of the low dropout voltage regulator until it brought to a lower voltage level; disabling the internal load voltage source is disabled: applying a profile compensation current after the low dropout voltage regulator is disabled to counteract the dielectric absorption current of the recharging output load capacitor to prevent the low dropout voltage regulator from becoming unregulated. ### Claim 22 (depends on 21) The method for compensating for the dielectric absorption current of claim 21 wherein applying the profile compensation current comprises the steps of: generating a continuous profile compensation current and applying the continuous profile compensation current to the output of the low dropout regulator. ### Claim 23 (depends on 21) The method for compensating for the dielectric absorption current of claim 21 wherein applying the profile compensation current comprises the steps of: generating a digital profile compensation current and applying the digital profile compensation current to the output of the low dropout regulator. ### Claim 24 An apparatus for compensating for the dielectric absorption current from the recharging of the output load capacitor of a low dropout voltage regulator comprising: means for requesting the low voltage regulator to decrease its output voltage; means for enabling an internal load current source to decrease the output voltage of the low dropout voltage regulator by adjusting the charge of the output load capacitor; means for ramping down an output voltage level of the low dropout voltage regulator until it brought to a to a lower voltage level; means for disabling the internal load voltage source is disabled; and means for applying a profile compensation current after the low dropout voltage regulator is disabled to counteract the dielectric absorption current of the recharging output load capacitor to prevent the low dropout voltage regulator from becoming unregulated. ### Claim 25 (depends on 24) The apparatus for compensating for the dielectric absorption current of claim 24 wherein the means for applying the profile compensation current comprises: means for generating a continuous profile compensation current and means for applying the continuous profile compensation current to the output of the low dropout regulator. ### Claim 26 (depends on 24) The apparatus for compensating for the dielectric absorption current of claim 24 wherein means for applying a profile compensation current comprises: means for generating a digital profile compensation current and means for applying the digital profile compensation current to the output of the low dropout regulator.