# US 2014/0152115 A1 · High power rf field effect transistor switching using dc biases

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- Number: US 2014/0152115 A1
- Document ID: US20140152115A1
- Status: Published application
- Kind: A1
- Application number: 13/835,285
- Filed: 2013-03-15
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: QUALCOMM Incorporated
- Applicants: Qualcomm Incorporated
- Inventors: Cody B. Wheeland; Linda S. Irish; William H. Von Novak, III; Gabriel Isaac Mayo
- Web page: https://patentgrep.com/patent/US20140152115A1

## CPC

- H02J 50/90: involving detection or optimisation of position, e.g. alignment
- H02J 50/12: of the resonant type
- H02J 50/60: responsive to the presence of foreign objects, e.g. detection of living beings
- H03J 3/20: of single resonant circuit by varying inductance only or capacitance only
- H02J 50/50: using additional energy repeaters between transmitting devices and receiving devices
- H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H03J: TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS

## Abstract

Systems, methods, and apparatus are provided for tuning in wireless power transfer circuits. One aspect of the disclosure provides an apparatus for tuning. The apparatus includes a field effect transistor having a gate, source, and drain, where the field effect transistor is configured to electrically engage a tuning element to an AC power path. In some embodiments, one of the source or drain contacts is at an alternating current voltage.

## Claims

### Claim 1

An apparatus for providing tuning in a wireless power transfer system, comprising:
a tuning element; and
a field effect transistor having a gate, a first terminal contact, and a second terminal contact, said first terminal contact is at an alternating current (AC) voltage, the field effect transistor configured to electrically engage the tuning element to an AC power path based on a change in an electrical characteristic of the gate with respect to an electrical characteristic of the first terminal contact.

### Claim 2 (depends on 1)

The apparatus of claim 1, further comprising a gate biasing circuitry configured to change the electrical characteristic of the gate with respect to the electrical characteristic of the first terminal contact to drive the field effect transistor, wherein the electrical characteristic comprises a bias potential.

### Claim 3 (depends on 1)

The apparatus of claim 1, further comprising a bias circuitry configured to reduce output capacitance of the field effect transistor by biasing the second terminal contact such that the second terminal contact is at higher bias than the first terminal contact.

### Claim 4 (depends on 3)

The apparatus of claim 3, wherein the drain bias circuitry comprises a self-biasing multiplier circuit.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the tuning element is connected parallel to the field effect transistor.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the field effect transistor comprises a n-type mosfet such that first terminal is a source terminal and the second terminal is a drain terminal of the field effect transistor.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the field effect transistor comprises a p-type mosfet such that first terminal is a drain terminal and the second terminal is a source terminal of the field effect transistor.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the tuning element comprises a capacitor or an inductor.

### Claim 9 (depends on 1)

The apparatus of claim 1, further comprising a second tuning element, wherein the second tuning element comprises a capacitor or an inductor.

### Claim 10 (depends on 1)

The apparatus of claim 1, further comprising a first DC block capacitor coupled to the drain and second DC block capacitor coupled to the source, wherein the first and the second blocking capacitors are configured keep the source and the drain contact floating relative to the AC path.

### Claim 11 (depends on 1)

The apparatus of claim 1, wherein the output capacitance of the field effect transistor substantially approaches the desired tuning in the wireless power transfer system.

### Claim 12 (depends on 1)

The apparatus of claim 1, wherein the gate is coupled to the first terminal with a capacitor.

### Claim 13

A method of wireless transmitting power, the method comprising:
providing a tuning element;
providing a field effect transistor having a gate, a first terminal contact, and a second terminal contact, said first terminal contact is at an alternating current (AC) voltage; and
electrically engaging the tuning element to an AC power path based on changing an electrical characteristic of the gate with respect to an electrical characteristic of the first terminal contact of the field effect transistor.

### Claim 14 (depends on 13)

The method of claim 13, further comprising the step of changing the electrical characteristic of the gate with respect to electrical characteristic of the first terminal contact using a gate biasing circuitry for driving the field effect transistor, wherein the electrical characteristic comprises a bias potential.

### Claim 15 (depends on 13)

The method of claim 13, further comprising the step of biasing the second terminal contact using a drain bias circuitry such that the second terminal contact is at higher bias than the first terminal contact.

### Claim 16 (depends on 15)

The method of claim 15, wherein the drain bias circuitry comprises a self-biasing multiplier circuit.

### Claim 17 (depends on 13)

The method of claim 13, wherein the tuning element is connected parallel to the field effect transistor.

### Claim 18 (depends on 13)

The method of claim 13, wherein the field effect transistor comprises a n-type mosfet such that the first terminal is a drain terminal and the second terminal is a source terminal of the field effect transistor.

### Claim 19 (depends on 13)

The method of claim 13, wherein the field effect transistor comprises a p-type mosfet such that the first terminal is a source terminal and the second terminal is a drain terminal of the field effect transistor.

### Claim 20 (depends on 13)

The method of claim 13, wherein the tuning element comprises a capacitor or an inductor.

### Claim 21 (depends on 13)

The method of claim 13, further comprising the step of providing a second tuning element wherein the second tuning comprises a capacitor or an inductor.

### Claim 22 (depends on 13)

The method of claim 13, further comprising the step of keeping the first terminal and the second terminal floating relative to the AC path.

### Claim 23 (depends on 13)

The method of claim 13, wherein the output capacitance of the field effect transistor substantially approaches the desired tuning in the wireless power transfer system.

### Claim 24 (depends on 13)

The method of claim 13, wherein the gate is coupled to the first terminal with a capacitor.

### Claim 25

A tuning circuit, configured to provide tuning in a wireless power transfer system, the tuning circuit comprising:
means for tuning;
means for switching, said means for switching comprises a field effect transistor having a gate, a first terminal contact, and a second terminal contact, said first terminal contact is at an alternating current (AC) voltage; and
means for electrically engaging the tuning element to an AC power path based on changing an electrical characteristic of the gate with respect to an electrical characteristic of the first terminal contact of the field effect transistor.

### Claim 26 (depends on 25)

The tuning circuit of claim 25, further comprising the means for changing the electrical characteristic of the gate with respect to electrical characteristic of the first terminal contact using a gate biasing circuitry for driving the field effect transistor, wherein the electrical characteristic comprises a bias potential.

### Claim 27 (depends on 25)

The tuning circuit of claim 25, further comprising the means for biasing the second terminal contact using a drain bias circuitry such that the second terminal contact is at higher bias than the first terminal contact.

### Claim 28 (depends on 27)

The tuning circuit of claim 27, wherein the drain bias circuitry comprises a self-biasing multiplier circuit.

### Claim 29 (depends on 25)

The tuning circuit of claim 25, wherein the tuning element is connected parallel to the field effect transistor.

### Claim 30 (depends on 25)

The tuning circuit of claim 25, wherein the field effect transistor comprises a n-type mosfet such that the first terminal is a drain terminal and the second terminal is a source terminal of the field effect transistor.

### Claim 31 (depends on 25)

The tuning circuit of claim 25, wherein the field effect transistor comprises a p-type mosfet such that the first terminal is a source terminal and the second terminal is a drain terminal of the field effect transistor.

### Claim 32 (depends on 25)

The tuning circuit of claim 25, wherein the tuning element comprises a capacitor or an inductor.

### Claim 33 (depends on 25)

The tuning circuit of claim 25, further comprising the means for providing a second tuning element wherein the second tuning comprises a capacitor or an inductor.

### Claim 34 (depends on 25)

The tuning circuit of claim 25, further comprising the means for keeping the first terminal and the second terminal floating relative to the AC path.

### Claim 35 (depends on 25)

The tuning circuit of claim 25, wherein the output capacitance of the field effect transistor substantially approaches the desired tuning in the wireless power transfer system.

### Claim 36 (depends on 25)

The tuning circuit of claim 25, wherein the gate is coupled to the first terminal with a capacitor.