# US 2014/0152103 A1 · Enhanced re-hosting capability for legacy hardware and software > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0152103 A1 - Document ID: US20140152103A1 - Status: Published application - Kind: A1 - Application number: 13/771,870 - Filed: 2013-02-20 - Published: 2014-06-05 - Earliest claimed: 2012-02-21 - Assignees: Applied Materials, Inc. - Inventors: Ronald Vern Schauer; Mark Roger Covington; Suresh Kumaraswami; Amitabh Puri - Web page: https://patentgrep.com/patent/US20140152103A1 ## CPC - G06F 1/263: {Arrangements for using multiple switchable power supplies, e.g. battery and AC (G06F1/30 takes precedence)} - G05B 19/02: electric - G06F 9/45508: {Runtime interpretation or emulation, e g. emulator loops, bytecode interpretation} - G06F 13/105: {where the program performs an input/output emulation function} - H02J 4/00: Circuit arrangements for mains or distribution networks not specified as AC or DC; Circuit arrangements for mains or distribution networks combining AC and DC sections or sub-networks (arrangements using intermediate DC-AC-DC conversion H02J1/002; arrangements using high-voltage DC [HVDC] links H02J3/36) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G) - H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY ## Abstract Embodiments of the invention are directed toward systems and methods that execute legacy semiconductor applications using a non-legacy controller. In some embodiments a hardware abstraction layer and/or an emulator can be used to provide communication between a non-legacy operating system and legacy components including legacy applications. In some embodiments various methods and/or devices can be used to emulate and/or translate communications between legacy and non-legacy components. ## Claims ### Claim 1 A semiconductor process control system comprising: an operating system; a legacy application module that was not developed to operate in conjunction with the operating system, wherein the legacy application module is configured to interface with at least one semiconductor processing chamber and comprising at least one semiconductor processing application; and a hardware abstraction module configured to provide communication between the operating system and the legacy application module, and configured to interface with an at least one semiconductor processing chamber. ### Claim 2 (depends on 1) The semiconductor process control system according to claim 1, wherein the hardware abstraction module links the operating system and the legacy application module. ### Claim 3 (depends on 1) The semiconductor process control system according to claim 1, wherein the legacy application module includes code for controlling the at least one semiconductor processing chamber. ### Claim 4 (depends on 1) The semiconductor process control system according to claim 1, wherein the hardware abstraction module provides timing information to the legacy application module. ### Claim 5 (depends on 1) The semiconductor process control system according to claim 1, wherein the hardware abstraction module allows the operating system to control the at least one semiconductor processing chamber without modification of applications in the legacy application module. ### Claim 6 (depends on 3) The semiconductor process control system according to claim 3, wherein the operating system controls operation of the at least one semiconductor processing chamber through the hardware abstraction module and by using the code from the legacy application module. ### Claim 7 (depends on 1) The semiconductor process control system according to claim 1, further comprising an interpreter module configured to communicate with an operator interface. ### Claim 8 (depends on 1) The semiconductor process control system according to claim 1, wherein the operating system is configured to provide either or both power and process monitoring. ### Claim 9 A semiconductor processing control system comprising: a semiconductor tool interface; a database storing a plurality application files for use with semiconductor tools coupled with the semiconductor tool interface, wherein each of at least a subset of the application files includes instructions for operating a semiconductor tool using Motorola-based protocols; an Intel-based processor is configured to process emulation code for emulating a Motorola-based environment that processes at least one of the plurality of application files; and a bridge communicatively coupled with the Intel-based processor and communicatively coupled with the semiconductor tool interface, wherein the bridge converts communication using Intel-based protocols into communication using Motorola-based protocols and vice versa. ### Claim 10 (depends on 9) The semiconductor processing control system according to claim 9, further comprising a first user interface communicatively coupled with the Intel processor. ### Claim 11 (depends on 10) The semiconductor processing control system according to claim 10, further comprising a second user interface communicatively coupled with the Intel processor, wherein the second user interface is processed by the emulation code. ### Claim 12 (depends on 11) The semiconductor processing control system according to claim 11, wherein the second user interface is configured to send and receive commands from a user to operate semiconductor tools coupled with the semiconductor tool interface. ### Claim 13 (depends on 9) The semiconductor processing control system according to claim 9, further comprising a power supply system communicatively coupled with the Intel processor. ### Claim 14 (depends on 9) The semiconductor processing control system according to claim 9, wherein the Intel-based processor is configured to process code that sends a randomized message to a semiconductor tool through the semiconductor tool interface and the bridge. ### Claim 15 (depends on 14) The semiconductor processing control system according to claim 14, wherein the bridge converts the randomized message from a message according to Intel-based protocols into a message according to Motorola-based protocols. ### Claim 16 (depends on 14) The semiconductor processing control system according to claim 14, wherein the randomized message includes at least a portion of a representation of a serial number of the semiconductor tool. ### Claim 17 (depends on 14) The semiconductor processing control system according to claim 14, wherein a plurality of randomized messages a sent every second. ### Claim 18 A semiconductor processing control system power supply comprising: an AC adapter configured to couple with an AC power source and convert AC power to DC power; a processing tool adapter configured to provide power to a semiconductor processing tool; a DC control system adapter electrically coupled with the AC adapter and configured to provide power to a control system; a DC fan adapter electrically coupled with the AC adapter and configured to provide power to a fan module; and a power supply control module configured to monitor power consumption. ### Claim 19 (depends on 18) The semiconductor processing control system power supply according to claim 18, further comprising a DC battery adapter electrically coupled with the AC adapter and configured to provide power to a battery. ### Claim 20 (depends on 19) The semiconductor processing control system power supply according to claim 19, wherein the power supply control module controls charging of the battery. ### Claim 21 (depends on 19) The semiconductor processing control system power supply according to claim 19, wherein the power supply control module controls load switching of the battery. ### Claim 22 (depends on 18) The semiconductor processing control system power supply according to claim 18, wherein the power supply control module is configured to monitor power consumption at the fan module. ### Claim 23 (depends on 18) The semiconductor processing control system power supply according to claim 18, wherein the power supply control module is configured to monitor power consumption at the control system. ### Claim 24 (depends on 18) The semiconductor processing control system power supply according to claim 18, wherein the power supply control module is configured to monitor temperatures within either or both the fan module and the control system. ### Claim 25 (depends on 18) The semiconductor processing control system power supply according to claim 18, wherein the power supply control module is configured to monitor a fan speed of one or more fans within the fan module. ### Claim 26 (depends on 18) The semiconductor processing control system power supply according to claim 18, wherein the control system is an external control system. ### Claim 27 (depends on 18) The semiconductor processing control system power supply according to claim 18, further comprising a semiconductor processing tool adapter, and wherein the power supply control module is configured to monitor power consumption at the processing tool adapter. ### Claim 28 (depends on 18) The semiconductor processing control system power supply according to claim 18, further comprising a communication adapter configured to be communicatively coupled with the control system. ### Claim 29 (depends on 18) The semiconductor processing control system power supply according to claim 18, wherein the power supply control module is configured to monitor parameters selected from the list consisting of overall power status, DC bus voltages, DC bus load currents, incoming line parameters, fan temperatures, power supply module temperature, control system temperature, control system CPU core loading, Backplane bus activity, and overall machine state.