# US 2014/0151823 A1 · Mems devices and methods of forming same

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- Number: US 2014/0151823 A1
- Document ID: US20140151823A1
- Status: Published application
- Kind: A1
- Application number: 13/953,238
- Filed: 2013-07-29
- Published: 2014-06-05
- Earliest claimed: 2011-07-22
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Bruce C.S. Chou
- Web page: https://patentgrep.com/patent/US20140151823A1

## CPC

- B81B 3/0018: {Structures acting upon the moving or flexible element for transforming energy into mechanical movement or vice versa, i.e. actuators, sensors, generators}
- B81C 1/00476: {removing a sacrificial layer (B81C1/00912 takes precedence)}
- B81C 1/00801: {Avoid alteration of functional structures by etching, e.g. using a passivation layer or an etch stop layer (B81C1/00595, B81C1/00468 take precedence)}
- B81B 2203/0307: Anchors
- B81B 2203/04: Electrodes
- B81B 2207/07: Interconnects
- B81C 2201/0109: Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
- H10W 72/01212: {at a different location than on the final device, e.g. forming solder preforms}
- H10W 72/01953: {by etching}
- H10W 72/072: {of bump connectors}
- H10W 72/07202: {using auxiliary members}
- H10W 72/07204: {using temporary auxiliary members, e.g. sacrificial coatings}
- H10W 72/221: {Structures or relative sizes}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 80/016: {Cleaning}
- H10W 80/033: {by chemical means, e.g. etching}
- H10W 80/037: {by mechanical treatment, e.g. by cutting, pressing or stamping}
- H10W 80/102: {Controlling the environment during the bonding, e.g. the temperature or pressure}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The present invention provides a MEMS structure comprising confined sacrificial oxide layer and a bonded Si layer. Polysilicon stack is used to fill aligned oxide openings and MEMS vias on the sacrificial layer and the bonded Si layer respectively. To increase the design flexibility, some conductive polysilicon layer can be further deployed underneath the bonded Si layer to form the functional sensing electrodes or wiring interconnects. The MEMS structure can be further bonded to a metallic layer on top of the Si layer and the polysilicon stack.

## Claims

### Claim 1

A micro-electromechanical system (MEMS), comprising:
a substrate;
an isolation layer on top of the substrate, wherein the isolation layer comprises silicon nitride;
a sacrificial layer on top of the isolation layer, wherein the sacrificial layer has a flat surface and at least one opening extending therethrough;
a wafer layer bonded to the sacrificial layer, wherein the wafer layer has at least one MEMS via;
a conductor stack within the at least one MEMS via;
a MEMS structure formed in the wafer; and
a cavity between the isolation layer and the MEMS structure.

### Claim 2

(canceled)

### Claim 3 (depends on 1)

The MEMS of claim 1, further comprising an anchor electrode on the isolation layer and wherein the conductor stack extends to and contacts the anchor electrode.

### Claim 4 (depends on 1)

The MEMS of claim 1, wherein the wafer layer has a thickness between 2 to 100 um.

### Claim 5 (depends on 1)

The MEMS of claim 1, further comprising an opening in the sacrificial layer aligned to at least one MEMS via, the conductor stack extending through the opening.

### Claim 6 (depends on 1)

The MEMS of claim 1, wherein the conductor stack is in the form of a trench surrounding a region of the sacrificial layer, a single via, or multiple vias.

### Claim 7 (depends on 1)

The MEMS of claim 1, wherein the at least one opening comprises about five percent or less of the surface area of the sacrificial layer.

### Claim 8

A system, comprising:
a substrate;
an isolation layer atop the substrate;
a sacrificial layer atop the isolation layer;
a first opening extending through the sacrificial layer;
a wafer layer bonded to the sacrificial layer;
a second opening extending through the wafer layer, and aligned with the first opening;
a conductor stack filling the first opening and the second opening, wherein the conductor stack comprises doped polysilicon;
an etch hole extending through the wafer layer; and
a cavity under a region of the wafer layer.

### Claim 9 (depends on 8)

The system of claim 8, further including:
a MEMS structure formed in the wafer layer.

### Claim 10

(canceled)

### Claim 11 (depends on 8)

The system of claim 8, further comprising:
a contact atop the conductor stack.

### Claim 12 (depends on 11)

The system of claim 11, wherein the contact atop the conductor stack comprises a material selected from the group consisting of Ti, W, Al, Cu, polysilicon, compositions thereof, and combinations thereof.

### Claim 13 (depends on 8)

The system of claim 8, further comprising an electrode on the isolation layer.

### Claim 14 (depends on 13)

The system of claim 13 wherein the electrode on the isolation layer is aligned with the conductor stack.

### Claim 15 (depends on 8)

The system of claim 8, wherein the wafer layer comprises a bulk silicon layer.

### Claim 16

A system comprising:
a silicon-containing substrate;
a nitride layer on the substrate;
a sacrificial oxide layer on the nitride layer, wherein the sacrificial oxide layer has at least one opening extending therethrough;
a silicon layer bonded to the sacrificial layer, wherein the silicon layer has at least one MEMS via extending therethrough, the at least one MEMS via being aligned with the at least one opening in the sacrificial oxide layer;
a polysilicon conductor within the at least one MEMS via and the at least one opening in the sacrificial oxide;
a MEMS structure formed in the silicon layer; and
a cavity between the nitride layer and the MEMS structure.

### Claim 17 (depends on 16)

The system of claim 16, further comprising an electrode on the nitride layer and aligned with the polysilicon conductor.

### Claim 18 (depends on 16)

The system of claim 16, wherein the silicon has a thickness of from about 2 μm to about 100 μm.

### Claim 19 (depends on 16)

The system of claim 16, further comprising a contact atop the polysilicon conductor.

### Claim 20 (depends on 16)

The system of claim 16, wherein the polysilicon extends through the silicon layer and partially overlies the silicon layer.