# US 2014/0151822 A1 · Structured Gap for a MEMS Pressure Sensor

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- Number: US 2014/0151822 A1
- Document ID: US20140151822A1
- Status: Published application
- Kind: A1
- Application number: 13/705,441
- Filed: 2012-12-05
- Published: 2014-06-05
- Earliest claimed: 2012-12-05
- Assignees: Robert Bosch GmbH
- Applicants: Robert Bosch GmbH
- Inventors: Andrew B. Graham; Gary Yama; Gary O'Brien
- Web page: https://patentgrep.com/patent/US20140151822A1

## CPC

- B81C 1/00642: {for improving the physical properties of a device}
- B81B 3/0021: {Transducers for transforming electrical into mechanical energy or vice versa (dynamo-electric machines H02K99/00; electrostatic machines H02N1/00; piezoelectric devices H10N30/00)}
- G01L 9/0047: {Diaphragm with non uniform thickness, e.g. with grooves, bosses or continuously varying thickness}
- G01L 9/0073: {using a semiconductive diaphragm}
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)
- G01L: MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE (weighing G01G)

## Abstract

A method of fabricating a pressure sensor includes performing a chemical vapor deposition (CVD) process to deposit a first sacrificial layer having a first thickness onto a substrate. A portion of the first sacrificial layer is then removed down to the substrate to form a central region of bare silicon. One of a thermal oxidation process and an atomic layer deposition process is then performed to form a second sacrificial layer on the substrate having a second thickness in the central region that is less than the first thickness. A cap layer is then deposited over the first and second sacrificial layers. The second sacrificial layer is removed from the central region, and the first and second sacrificial layers are removed from a perimeter region that at least partially surrounds the central region on the substrate to form a contiguous, structured gap between the cap layer and the substrate, the structured gap having a first width in the central region and a second width in the perimeter region with the second width being greater than the first width.

## Claims

### Claim 1

A method of fabricating a pressure sensor comprising:
performing chemical vapor deposition (CVD) process to deposit a first sacrificial layer having a first thickness onto a substrate;
removing a portion of the first sacrificial layer down to the substrate to form a central region of bare silicon;
performing one of a thermal oxidation process and an atomic layer deposition process to form a second sacrificial layer on the substrate, the second sacrificial layer having a second thickness in the central region, the second thickness being less than the first thickness;
depositing a cap layer over the first and second sacrificial layers; and
removing the second sacrificial layer from the central region and removing the first and second sacrificial layers from a perimeter region that at least partially surrounds the central region on the substrate to form a contiguous, structured gap between the cap layer and the substrate, the structured gap having a first width in the central region and a second width in the perimeter region, the second width being greater than the first width.

### Claim 2 (depends on 1)

The method of claim 1, wherein the cap layer comprises an epitaxial deposition of polysilicon.

### Claim 3 (depends on 2)

The method of claim 2, wherein the first sacrificial layer comprises silicon dioxide.

### Claim 4 (depends on 3)

The method of claim 3, wherein the first sacrificial layer is removed to form the central region of bare silicon by etching.

### Claim 5 (depends on 1)

The method of claim 1, wherein the second sacrificial layer is formed using a thermal oxidation process such that the second sacrificial layer comprises a thermal oxide, the thermal oxide being grown to the second thickness in the central region of the substrate and being grown to a third thickness on regions of the substrate covered by the first sacrificial layer, the third thickness being less than the second thickness.

### Claim 6 (depends on 1)

The method of claim 1, wherein the second sacrificial layer is formed using an atomic layer deposition process such that the second sacrificial layer comprises a silicon oxide, the thermal oxide being grown to the second thickness in the central region of the substrate and being grown to a third thickness on regions of the substrate covered by the first sacrificial layer, the third thickness being less than the second thickness.

### Claim 7 (depends on 2)

The method of claim 2, wherein the second thickness is approximately 1-1000 nm.

### Claim 8 (depends on 1)

The method of claim 1, wherein the structured gap is formed by etching the first and second sacrificial layers in the central region and the perimeter region of the substrate.

### Claim 9 (depends on 1)

The method of claim 1, further comprising:
sealing the cap layer.

### Claim 10

A semiconductor device comprising:
a substrate defining a sensing region and a perimeter region at least partially surrounding the sensing region;
a first sacrificial layer deposited onto the substrate and having a first thickness, the first sacrificial layer being located in the perimeter region;
a second sacrificial layer deposited onto the substrate using a thermal oxidation process or an atomic layer deposition process, the second sacrificial layer having a second thickness in the sensing region, the second thickness being less than the first thickness; and a cap layer deposited over the first and second sacrificial layers in the sensing region and the perimeter region.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, wherein the substrate includes a first electrode in the sensing region.

### Claim 12 (depends on 11)

The semiconductor device of claim 11, wherein the cap layer comprises an epitaxial deposition of polysilicon configured to form a second electrode that extends over the sensing region.

### Claim 13 (depends on 12)

The semiconductor device of claim 12, wherein the second sacrificial layer comprises a thermal oxide formed using a thermal oxidation process.

### Claim 14 (depends on 10)

The semiconductor device of claim 10, wherein the second sacrificial layer has a third thickness in the perimeter region, the third thickness being less than the second thickness.

### Claim 15

A semiconductor device comprising:
a substrate defining a sensing region on a surface of the substrate and including a first electrode located in the sensing region;
a support layer on the substrate that forms a perimeter surrounding the sensing region, the support layer being spaced apart from the sensing region to define a perimeter region on the substrate that surrounds the sensing region; and
a flexible membrane including a second electrode, the flexible membrane being arranged on the support layer extending over the sensing region to position the second electrode above the first electrode, the flexible membrane having a lower surface that faces toward the substrate, the lower surface including a central portion and a perimeter portion, the central portion being located above the sensing region of the substrate, the perimeter portion being located above the perimeter region on the substrate;
wherein the central portion of the lower surface of the membrane is spaced a first distance apart from the surface of the substrate, and the perimeter portion of the lower surface is spaced a second distance apart from the surface of the substrate, the second distance being greater than the first distance.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein the flexible membrane comprises an epi-poly cap layer.

### Claim 17 (depends on 16)

The semiconductor device of claim 16, wherein the substrate comprises a silicon substrate.

### Claim 18 (depends on 16)

The semiconductor device of claim 16, wherein the lower surface of the membrane defines a capacitive gap between the membrane and the substrate, the gap having a first gap width between the central portion of the lower surface and the substrate and a second gap width between the perimeter portion of the lower surface and the substrate, the second gap width being greater than the first gap width.