# US 2014/0151809 A1 · Apparatus for esd protection

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- Number: US 2014/0151809 A1
- Document ID: US20140151809A1
- Status: Published application
- Kind: A1
- Application number: 13/693,294
- Filed: 2012-12-04
- Published: 2014-06-05
- Earliest claimed: 2012-12-04
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company,
- Inventors: Wun-Jie Lin; Bo-Ting Chen; Jen-Chou Tseng; Ming-Hsiang Song
- Web page: https://patentgrep.com/patent/US20140151809A1

## CPC

- H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 62/117: {Shapes of semiconductor bodies}
- H10D 89/611: {using diodes as protective elements}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A structure comprises an N+ region formed over a substrate, a P+ region formed over the substrate, wherein the P+ region and the N+ region form a diode and a first epitaxial growth block region formed between the N+ region and the P+ region.

## Claims

### Claim 1

A structure comprising:
an N+ region formed over a substrate;
a P+ region formed over the substrate, wherein the P+ region and the N+ region form a diode; and
a first epitaxial growth block region formed between the N+ region and the P+ region, wherein the first epitaxial growth block region comprises silicon nitride.

### Claim 2 (depends on 1)

The structure of claim 1, wherein:
the N+ region is formed in an n-well of the substrate; and
the P+ region is formed in the n-well of the substrate, and wherein the N+ region and the P+ region form a p-type electrostatic discharge (ESD) protection diode.

### Claim 3 (depends on 1)

The structure of claim 1, wherein:
the N+ region is formed in a p-well of the substrate; and
the P+ region is formed in the p-well of the substrate, and wherein the N+ region and the P+ region form an n-type ESD protection diode.

### Claim 4

(canceled)

### Claim 5 (depends on 1)

The structure of claim 1, further comprising:
a second epitaxial growth block region formed on an opposite side of the N+ region with respect to the first epitaxial growth block region; and
a third epitaxial growth block region formed on an opposite side of the P+ region with respect to the first epitaxial growth block region.

### Claim 6 (depends on 5)

The structure of claim 5, wherein:
the second epitaxial growth block region comprises silicon nitride; and
the third epitaxial growth block region comprises silicon nitride.

### Claim 7 (depends on 1)

The structure of claim 1, wherein:
the first epitaxial growth block region is of a width approximately equal to 144 nm.

### Claim 8

A system comprising:
an integrated circuit comprising:
a first terminal coupled to a first voltage rail;
a second terminal coupled to an input/output pad; and
a third terminal coupled to a second voltage rail;
a first electrostatic discharge (ESD) protection diode coupled between the first voltage rail and the input/output pad, wherein the first ESD protection diode comprises:
a first N+ region formed in an n-well of a substrate;
a first P+ region formed in the n-well of the substrate; and
a first epitaxial growth block region formed between the first N+ region and the first P+ region; and
a second ESD protection diode coupled between the second voltage rail and the input/output pad, wherein the second ESD protection diode comprises:
a second N+ region formed in a p-well of the substrate;
a second P+ region formed in the p-well of the substrate; and
a second epitaxial growth block region formed between the second N+ region and the second P+ region.

### Claim 9 (depends on 8)

The system of claim 8, wherein:
the first epitaxial growth block region comprises silicon nitride; and
the second epitaxial growth block region comprises silicon nitride.

### Claim 10 (depends on 8)

The system of claim 8, wherein:
the first voltage rail is connected to a power source; and
the second voltage rail is connected to ground.

### Claim 11 (depends on 8)

The system of claim 8, wherein:
the first N+ region is coupled to the first voltage rail;
the first P+ region is coupled to the input/output pad;
the second N+ region is coupled to the input/output pad; and
the second P+ region is coupled to the second voltage rail.

### Claim 12 (depends on 8)

The system of claim 8, further comprising:
a plurality of p-type ESD protection diodes connected in parallel with the first ESD protection diode; and
a plurality of n-type ESD protection diodes connected in parallel with the second ESD protection diode.

### Claim 13 (depends on 12)

The system of claim 12, wherein:
each active region of the plurality of p-type ESD protection diodes is separated from an adjacent active region by an epitaxial growth block region; and
each active region of the plurality of n-type ESD protection diodes is separated from an adjacent active region by the epitaxial growth block region.

### Claim 14 (depends on 8)

The system of claim 8, wherein:
the first ESD protection diode is a p-type ESD protection diode having an anode coupled to the input/output pad and a cathode coupled to the first voltage rail.

### Claim 15 (depends on 8)

The system of claim 8, wherein:
the second ESD protection diode is an n-type ESD protection diode having an anode coupled to the second voltage rail and a cathode coupled to the input/output pad.

### Claim 16

A method comprising:
forming an active region including a plurality of fins;
depositing an epitaxial growth block layer over the active region;
patterning the epitaxial growth block layer to define a first growth area for an N+region and a second growth area for a P+ region;
removing portions of the active region in the first growth area and the second growth area; and
growing the N+ region and the P+ region through an epitaxial growth process, wherein the N+ region and the P+ region form an electrostatic discharge (ESD) protection diode.

### Claim 17 (depends on 16)

The method of claim 16, wherein:
the N+ region is formed in a p-well of a substrate; and
the P+ region is formed in the p-well of the substrate, and wherein the N+ region and the P+ region form an n-type ESD protection diode.

### Claim 18 (depends on 16)

The method of claim 16, wherein:
the N+ region is formed in an n-well of a substrate; and
the P+ region is formed in the n-well of the substrate, and wherein the N+ region and the P+ region form a p-type ESD protection diode.

### Claim 19 (depends on 16)

The method of claim 16, further comprising:
forming a first contact on the N+ region, wherein the first contact is a cathode of the ESD protection diode; and
forming a second contact on the P+ region, wherein the second contact is an anode of the ESD protection diode.

### Claim 20 (depends on 16)

The method of claim 16, wherein:
the epitaxial growth block layer comprises silicon nitride.