# US 2014/0151796 A1 · Hybrid high voltage device and manufacturing method thereof

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- Number: US 2014/0151796 A1
- Document ID: US20140151796A1
- Status: Published application
- Kind: A1
- Application number: 14/176,973
- Filed: 2014-02-10
- Published: 2014-06-05
- Earliest claimed: 2012-06-21
- Assignees: Richtek Technology Corporation
- Inventors: Tsung-Yi Huang; Chien-Hao Huang
- Web page: https://patentgrep.com/patent/US20140151796A1

## CPC

- H10D 84/151: {LDMOS having built-in components}
- H10D 30/0281: {of lateral DMOS [LDMOS] FETs}
- H10D 30/603: {having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]}
- H10D 30/65: Lateral DMOS [LDMOS] FETs
- H10D 64/516: {the thicknesses being non-uniform}
- H10D 64/519: {characterised by their top-view geometrical layouts}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D 62/126: {Top-view geometrical layouts of the regions or the junctions}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 64/111: {Field plates}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

The present invention discloses a hybrid high voltage device and a manufacturing method thereof. The hybrid high voltage device is formed in a first conductive type substrate, and includes at least one lateral double diffused metal oxide semiconductor (LDMOS) device region and at least one vent device region, wherein the LDMOS device region and the vent device region are connected in a width direction and arranged in an alternating order. Besides, corresponding high voltage wells, sources, drains, body regions, and gates of the LDMOS device region and the vent device region are connected to each other respectively.

## Claims

### Claim 1

A hybrid high voltage device formed in a first conductive type substrate, wherein the substrate has an upper surface, the hybrid high voltage device comprising:
at least one lateral double diffused metal oxide semiconductor (LDMOS) device region, which is formed in the substrate, wherein the LDMOS device region includes a first source, a first drain, a first body region, and a first gate; and
at least one vent device region, which is formed in the substrate, wherein the vent device includes a second source, a second drain, a second body region, and a second gate, and wherein the vent device has a conduction resistance which is lower than a conduction resistance of the LDMOS device region;
wherein the LDMOS device region and the vent device region are arranged in an alternating order in a width direction, and the first source, the first drain, the first body region, and the first gate are physically connected or electrically connected to the second source, the second drain, the second body region, and the second gate respectively.

### Claim 2 (depends on 1)

The hybrid high voltage device of claim 1, wherein the LDMOS device region includes:
a second conductive type first high voltage well, which is formed in the substrate beneath the upper surface;
a field oxide region, which is formed on the upper surface, and is located in the high voltage well from top view;
the first gate, which is formed on the upper surface, wherein part of the first gate is above the first field oxide region;
the second conductive type first source and the second conductive type first drain, which are formed beneath the upper surface at two sides of the first gate respectively, wherein the first drain and the first source are separated by the first gate and the field oxide region from top view, and the first drain is formed in the first high voltage well; and
the first conductive type first body region, which is formed in the substrate beneath the upper surface, wherein the first source is in the first body region; and
the vent device region includes:
a second conductive type second high voltage well, which is formed in the substrate beneath the upper surface, and is connected to the first high voltage well;
the second gate, which is formed on the upper surface, and is connected to the first gate;
the second conductive type second source and the second conductive type second drain, which are formed beneath the upper surface at two sides of the second gate respectively, wherein the second drain and the second source are separated by the second gate from top view, and the second drain is formed in the second high voltage well, the second source being connected to the first source, and the second drain being connected to the first drain; and
the first conductive type second body region, which is formed in the substrate beneath the upper surface, wherein the second source is in the first body region.

### Claim 3 (depends on 1)

The hybrid high voltage device of claim 1, wherein the vent device region has a width not wider than 0.4 um.

### Claim 4 (depends on 2)

The hybrid high voltage device of claim 2, wherein the first body region and the second body region are isolated from the substrate by the first high voltage well and the second high voltage well respectively, such that the first body region and the second body region are not in direct contact with the substrate.

### Claim 5 (depends on 1)

The hybrid high voltage device of claim 1, wherein at least part of the first body region and at least part of the second body region are physically connected to the substrate, or indirectly connected to the substrate through a first conductive type connection well, such that the first body region and the second body region are electrically connected to the substrate.

### Claim 6 (depends on 1)

The hybrid high voltage device of claim 1, wherein the first source and the second source are integrated as one piece, and the first drain and second drain are integrated as one piece, such that the LDMOS device region and the vent device region form a single device.

### Claim 7 (depends on 2)

The hybrid high voltage device of claim 2, further comprising:
a dielectric layer, which is formed above the second gate and the second high voltage well; and
a conductive layer, which is formed above the dielectric layer, and the conductive layer overlaps at least part of the second high voltage well between the second gate and the second drain from top view.

### Claim 8 (depends on 7)

The hybrid high voltage device of claim 7, wherein the conductive layer is electrically connected to the second gate.

### Claim at position 9

9-15. (canceled)