# US 2014/0151749 A1 · High electron mobility transistor and method of manufacturing the same

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- Number: US 2014/0151749 A1
- Document ID: US20140151749A1
- Status: Published application
- Kind: A1
- Application number: 14/091,822
- Filed: 2013-11-27
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Woo-chul JEON; Jong-seob KIM; Ki-yeol PARK; Young-hwan PARK; Jai-kwang SHIN; Jae-joon OH; Hyuk-soon CHOI; In-jun HWANG
- Web page: https://patentgrep.com/patent/US20140151749A1

## CPC

- H10P 14/66: {characterised by the type of materials}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 8/422: {PN diodes having the PN junctions in mesas}
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10D 62/343: {Gate regions of field-effect devices having PN junction gates}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode.

## Claims

### Claim 1

A high electron mobility transistor (HEMT) comprising:
a channel layer;
a channel supply layer on the channel layer;
a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer;
a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode;
a first depletion-forming layer between the gate electrode and the channel supply layer; and
at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode,
the at least one second depletion-forming layer being electrically connected to the source electrode.

### Claim 2 (depends on 1)

The HEMT of claim 1, wherein
a thickness of the at least one second depletion-forming layer is less than a thickness of the first depletion-forming layer.

### Claim 3 (depends on 2)

The HEMT of claim 2, wherein the thickness of the at least one second depletion-forming layer is about 20% to about 30% of the thickness of the first depletion-forming layer.

### Claim 4 (depends on 2)

The HEMT of claim 2, wherein
the channel layer includes a two-dimensional electron gas (2 DEG), and
a density of the two-dimensional electron gas (2 DEG) below the at least one second depletion-forming layer is about 90% of a density of a 2 DEG in an adjacent region of the channel layer.

### Claim 5 (depends on 2)

The HEMT of claim 2, wherein
the at least one second depletion-forming layer includes a plurality of second depletion-forming layers on the channel supply layer, and
the plurality of second depletion-forming layers are spaced apart from each other along a width direction of a channel in the channel layer.

### Claim 6 (depends on 5)

The HEMT of claim 5, wherein the plurality of second depletion-forming layers has a stripe pattern that is parallel to the width direction of the channel in the channel layer.

### Claim 7 (depends on 2)

The HEMT of claim 2, wherein the at least one second depletion-forming layer is one continuous second depletion-forming layer that extends along a width direction of a channel in the channel layer.

### Claim 8 (depends on 2)

The HEMT of claim 2, wherein the at least one second depletion-forming layer is a plurality of second depletion-forming layers spaced apart from each other along a width direction of a channel in the channel layer.

### Claim 9 (depends on 1)

The HEMT of claim 1, wherein each of the first and the at least one second depletion-forming layers is a p-type semiconductor layer.

### Claim 10 (depends on 1)

The HEMT of claim 1, further comprising:
a first pad contacting the source electrode and the at least one second depletion-forming layer; and
a second pad contacting the drain electrode.

### Claim 11 (depends on 10)

The HEMT of claim 10, further comprising:
a passivation layer is between the gate electrode and the first pad.

### Claim 12

A method of manufacturing a high electron mobility transistor (HEMT), comprising:
forming a channel layer;
forming a channel supply layer on the channel layer;
forming a first depletion-forming layer and at least one second depletion-forming layer on the channel supply layer;
forming a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; and
forming a gate electrode on the first depletion-forming layer.

### Claim 13 (depends on 12)

The method of claim 12, wherein
a thickness of the at least one second depletion-forming layer is less than a thickness of the first depletion-forming layer, and
the at least one second depletion-forming layer is between the first depletion-forming layer and the drain electrode.

### Claim 14 (depends on 13)

The method of claim 13, wherein the forming the at least one second depletion-forming layer includes forming a plurality of second depletion-forming layers on the channel supply layer that are spaced apart from each other along a width direction of a channel in the channel layer.

### Claim 15 (depends on 13)

The method of claim 13, wherein the forming the at least one second-depletion forming layer includes forming one continuous second depletion-forming layer that extends along a width direction of a channel in the channel layer.

### Claim 16 (depends on 12)

The method of claim 12, further comprising:
forming a first pad contacting the source electrode and the at least one second depletion-forming layer; and
forming a second pad contacting the drain electrode.

### Claim 17 (depends on 16)

The method of claim 16, further comprising:
forming a passivation layer on the channel supply layer between the gate electrode and the first pad.