# US 2014/0151713 A1 · Method of growing nitride semiconductor layer, nitride semiconductor device, and method of fabricating the same

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- Number: US 2014/0151713 A1
- Document ID: US20140151713A1
- Status: Published application
- Kind: A1
- Application number: 14/091,808
- Filed: 2013-11-27
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: Seoul Viosys Co., Ltd.
- Applicants: Seoul Viosys Co., Ltd.
- Inventors: Woo Chul Kwak; Seung Kyu Choi; Jae Hoon Song; Chae Hon Kim; Jung Whan Jung
- Web page: https://patentgrep.com/patent/US20140151713A1

## CPC

- H10P 14/3416: {Nitrides}
- C30B 25/20: the substrate being of the same materials as the epitaxial layer
- C30B 29/406: {Gallium nitride}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2908: {Nitrides}
- H10P 14/2921: {being crystalline insulating materials}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3216: {Nitrides}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Exemplary embodiments of the present invention provide a method of growing a nitride semiconductor layer including growing a gallium nitride-based defect dispersion suppressing layer on a gallium nitride substrate including non-defect regions and a defect region disposed between the non-defect regions, and growing a gallium nitride semiconductor layer on the defect dispersion suppressing layer.

## Claims

### Claim 1

A method of growing a nitride semiconductor layer, the method comprising:
growing a gallium nitride-based defect dispersion suppressing layer on a gallium nitride substrate comprising non-defect regions and a defect region disposed between the non-defect regions; and
growing a gallium nitride semiconductor layer on the defect dispersion suppressing layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the defect dispersion suppressing layer is grown at a temperature in the range of 900° C. to 1030° C., and the growth temperature of the defect dispersion suppressing layer is lower temperature than the growth temperature of the gallium nitride semiconductor layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the defect dispersion suppressing layer is grown at a temperature in a range from 900° C. to 1000° C.

### Claim 4 (depends on 2)

The method of claim 2, wherein the defect dispersion suppressing layer is grown at a temperature in a range from 960° C. to 970° C.

### Claim 5 (depends on 2)

The method of claim 2, wherein the defect dispersion suppressing layer is grown at a slower growth rate than the gallium nitride semiconductor layer.

### Claim 6 (depends on 5)

The method of claim 5, wherein the defect dispersion suppressing layer is grown at a rate in a range from 1.5 μm/hr to 2.5 μm/hr.

### Claim 7 (depends on 6)

The method of claim 6, wherein the defect dispersion suppressing layer is grown to a thickness in a range from 1 μm to 2 μm.

### Claim 8 (depends on 7)

The method of claim 7, wherein the defect dispersion suppressing layer is grown at a pressure in a range from 150 torr to 400 torr.

### Claim 9 (depends on 8)

The method of claim 8, wherein the defect dispersion suppressing layer is grown at the same pressure as that of the gallium nitride semiconductor layer grown.

### Claim 10 (depends on 1)

The method of claim 1, wherein the defect dispersion suppressing layer is grown at a slower rate than the gallium nitride semiconductor layer.

### Claim 11 (depends on 10)

The method of claim 10, wherein the defect dispersion suppressing layer is grown at a rate in a range from 1.5 μm/hr to 2.5 μm/hr.

### Claim 12 (depends on 1)

The method of claim 1, wherein the defect dispersion suppressing layer is grown to a thickness in a range from 1 μm to 2 μm.

### Claim 13 (depends on 1)

The method of claim 1, wherein the gallium nitride substrate comprises a semi-polar or non-polar substrate, and the non-defect regions comprise different off-angles.

### Claim 14 (depends on 13)

The method of claim 13, wherein the gallium nitride semiconductor layer comprises:
an n-type contact layer disposed on the defect dispersion suppressing layer;
a p-type contact layer disposed on the n-type contact layer; and
an active layer disposed between the n-type contact layer and the p-type contact layer.

### Claim 15

A method of growing a gallium nitride semiconductor layer on a gallium nitride substrate, the method comprising:
preparing the gallium nitride substrate by growing a gallium nitride crystal on seed substrates using hydride vapor phase epitaxy (HVPE), followed by slicing the gallium nitride crystal;
growing a gallium nitride-based defect dispersion suppressing layer on the gallium nitride substrate using metal organic chemical vapor deposition; and
growing a gallium nitride semiconductor layer on the defect dispersion suppressing layer.

### Claim 16 (depends on 15)

The method of claim 15, wherein the gallium nitride substrate comprises non-defect regions and a first defect region disposed between the non-defect regions, and the gallium nitride semiconductor layer comprises a second defect region extending from the first defect region, and
wherein a width of the second defect region on a surface of the gallium nitride semiconductor layer does not exceed two times a width of the first defect region.

### Claim 17 (depends on 16)

The method of claim 16, wherein the defect dispersion suppressing layer is grown at a temperature in a range from 900° C. to 1000° C.

### Claim 18 (depends on 16)

The method of claim 16, wherein the defect dispersion suppressing layer is grown at a temperature in a range from 960° C. to 970° C.

### Claim 19 (depends on 16)

The method of claim 16, wherein the defect dispersion suppressing layer is grown at a slower rate than the gallium nitride semiconductor layer.

### Claim 20 (depends on 19)

The method of claim 19, wherein the defect dispersion suppressing layer is grown at a rate in a range from 1.5 μm/hr to 2.5 μm/hr.

### Claim 21

A nitride semiconductor device, comprising:
a gallium nitride substrate comprising non-defect regions and a defect region disposed between the non-defect regions;
a gallium nitride-based defect dispersion suppressing layer disposed on the gallium nitride substrate; and
a gallium nitride semiconductor layer disposed on the defect dispersion suppressing layer.

### Claim 22 (depends on 21)

The nitride semiconductor device of claim 21, wherein the gallium nitride semiconductor layer comprises:
an n-type contact layer disposed on the defect dispersion suppressing layer;
a p-type contact layer disposed on the n-type contact layer; and
an active layer disposed between the n-type and p-type contact layers.

### Claim 23 (depends on 22)

The nitride semiconductor device of claim 22, wherein gallium nitride semiconductor layer further comprises a device separation region.

### Claim 24 (depends on 23)

The nitride semiconductor device of claim 23, wherein the defect region is disposed under the device separation region.

### Claim 25 (depends on 23)

The nitride semiconductor device of claim 23, wherein the device separation region comprises a space formed in the gallium nitride semiconductor layer, and the defect region is disposed entirely under the space.

### Claim 26 (depends on 21)

The nitride semiconductor device of claim 21, wherein the defect dispersion suppressing layer is 1 μm to 2 μm thick.

### Claim 27 (depends on 21)

The nitride semiconductor device of claim 21, wherein the gallium nitride substrate comprises a semi-polar or non-polar substrate, and the non-defect regions comprise different off-angles.