# US 2014/0151696 A1 · Display device and method for manufacturing the same

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- Number: US 2014/0151696 A1
- Document ID: US20140151696A1
- Status: Published application
- Kind: A1
- Application number: 14/176,242
- Filed: 2014-02-10
- Published: 2014-06-05
- Earliest claimed: 2010-12-10
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Hideaki Kuwabara
- Web page: https://patentgrep.com/patent/US20140151696A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10D 30/6729: {characterised by the electrodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A conductive layer to be a gate electrode, an insulating layer to be a gate insulating layer, a semiconductor layer, and an insulating layer to be a channel protective layer, which are each included in a transistor, are successively formed without exposure to the air. A gate electrode (including another electrode or a wiring which is formed in the same layer) and an island-like semiconductor layer are formed through one photolithography step. A display device is manufactured through four photolithography steps including the photolithography step, a photolithography step of forming a contact hole, a photolithography step of forming a source electrode and a drain electrode (including another electrode or a wiring which is formed in the same layer), and a photolithography step of forming a pixel electrode (including another electrode or a wiring which are formed in the same layer).

## Claims

### Claim 1

A display device comprising:
a gate electrode;
a semiconductor layer;
a gate insulating layer between the gate electrode and the semiconductor layer;
an insulating layer in contact with the semiconductor layer;
a source electrode electrically connected to the semiconductor layer through a first contact hole in the insulating layer;
a drain electrode electrically connected to the semiconductor layer through a second contact hole in the insulating layer; and
a pixel electrode electrically connected to the drain electrode,
wherein side surfaces of the gate insulating layer, the semiconductor layer, and the insulating layer on one side are substantially aligned with one another.

### Claim 2 (depends on 1)

The display device according to claim 1,
wherein the semiconductor layer overlaps the gate electrode, and
wherein an end portion of the gate electrode is projected outside an end portion of the semiconductor layer.

### Claim 3 (depends on 1)

The display device according to claim 1, wherein the semiconductor layer is an oxide semiconductor layer.

### Claim 4 (depends on 1)

The display device according to claim 1, wherein at least one of the gate electrode, the source electrode, and the drain electrode comprises a material containing copper.

### Claim 5 (depends on 1)

The display device according to claim 1, further comprising a base layer below the gate electrode.

### Claim 6

A display device comprising:
a transistor and comprising:
a gate electrode;
a gate insulating layer over the gate electrode;
a semiconductor layer over the gate insulating layer;
a first insulating layer over the semiconductor layer;
a second insulating layer over the first insulating layer;
a source electrode over the second insulating layer and electrically connected to the semiconductor layer through a first contact hole in the first insulating layer and the second insulating layer; and
a drain electrode over the second insulating layer and electrically connected to the semiconductor layer through a second contact hole in the first insulating layer and the second insulating layer; and
a capacitor electrically connected to the transistor; and
a pixel electrode electrically connected to the drain electrode,
wherein side surfaces of the gate insulating layer, the semiconductor layer, and the first insulating layer of the transistor on one side are substantially aligned with one another, and
wherein the capacitor comprises a capacitor wiring, the drain electrode and the second insulating layer between the capacitor wiring and the drain electrode.

### Claim 7 (depends on 6)

The display device according to claim 6,
wherein the semiconductor layer overlaps the gate electrode, and
wherein an end portion of the gate electrode is projected outside an end portion of the semiconductor layer.

### Claim 8 (depends on 6)

The display device according to claim 6, wherein the semiconductor layer is an oxide semiconductor layer.

### Claim 9 (depends on 6)

The display device according to claim 6, wherein at least one of the gate electrode, the source electrode, and the drain electrode comprises a material containing copper.

### Claim 10 (depends on 6)

The display device according to claim 6, further comprising a base layer below the gate electrode.