# US 2014/0151694 A1 · Metal oxide tft with improved source/drain contacts

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2014/0151694 A1
- Document ID: US20140151694A1
- Status: Published application
- Kind: A1
- Application number: 14/175,521
- Filed: 2014-02-07
- Published: 2014-06-05
- Earliest claimed: 2011-06-08
- Assignees: Cbrite Inc.
- Inventors: Chan- Long Shieh; Gang Yu; Fatt Foong
- Web page: https://patentgrep.com/patent/US20140151694A1

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 34/42: with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.

## Claims

### Claim at position 1

1-21. (canceled)

### Claim 22

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor comprising:
a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration, the spaced apart source/drain metal contacts defining a channel region in the active layer;
a passivation layer positioned in overlying relationship on the channel region of the metal oxide semiconductor active layer, the passivation layer being formed with insulating material that has a glass transition temperature (Tg), below the Tg the insulating material functions as a chemical barrier to O2, H2O, H2, N2, and to chemicals used in following fabrication processes above the passivation layer, and above the Tg the insulating material behaves as semi-liquid with high viscosity and with sufficient mobility to oxygen, hydrogen, and nitrogen atoms; and
portions of the metal oxide semiconductor active layer in contact with the source/drain metal contacts having a carrier concentration greater than a carrier concentration in the channel region.

### Claim 23 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the carrier concentration in the portions of the metal oxide semiconductor active layer in contact with the source/drain metal contacts is greater than approximately 1 E18/cm3.

### Claim 24 (depends on 23)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 23 wherein the carrier concentration in the channel region of the metal oxide semiconductor active layer is reduced to less than 1 E18/cm3.

### Claim 25 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein each of the source/drain metal contacts has a first portion including a low work function metal and a high work function barrier metal, the work function of the low work function metal being one of equal to and lower than a work function of the metal oxide semiconductor active layer, and the work function of the barrier material being one of equal to and greater than the work function of the metal oxide semiconductor active layer, the first portion being positioned on the metal oxide semiconductor active layer, and a second portion of conductive metal positioned on the first portion.

### Claim 26 (depends on 25)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 25 wherein the low work function metal and the high work function barrier metal are mixed in a single layer.

### Claim 27 (depends on 25)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 25 wherein the low work function metal and the high work function barrier metal are each formed as a separate layer.

### Claim 28 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 further including source/drain metal contacts with a thin layer of low work function metal positioned on the metal oxide semiconductor active layer, the work function of the low work function metal being one of equal to and lower than a work function of the metal oxide semiconductor active layer, and a barrier layer of high work function metal positioned on the low work function metal, the work function of the high work function metal being one of equal to and greater than the work function of the metal oxide semiconductor active layer.

### Claim 29 (depends on 28)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 28 where in the thin layer of low work function metal the work function is lower than a work function of approximately 4 eV.

### Claim 30 (depends on 28)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 28 where in the barrier layer of high work function metal the work function is higher than a work function of approximately 4 eV.

### Claim 31

(canceled)

### Claim 32 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the insulating material of the etch stop passivation layer includes one of an inorganic material including “liquid glass” material or silicones, including WL5150, WL-3010, or Degussa.

### Claim 33 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the insulating material of the etch stop passivation layer includes one of an organic material comprising at least one of the following chemical groups: —O—, —COOH, —C═O, —O—O—, O═C—N—C═O, —C—OH, and —C—H.

### Claim 34

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor comprising:
a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration;
each of the source/drain contacts including a thin layer of low work function metal positioned on the metal oxide semiconductor active layer, the work function of the low work function metal being one of equal to and lower than a work function of the metal oxide semiconductor active layer; and
each of the source/drain contacts including a barrier layer of high work function metal positioned on the low work function metal, the work function of the high work function metal being one of equal to and greater than the work function of the metal oxide semiconductor active layer.

### Claim 35 (depends on 34)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 34 where in the thin layer of low work function metal the work function is lower than a work function of approximately 4 eV.

### Claim 36 (depends on 34)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 34 where in the barrier layer of high work function metal the work function is higher than a work function of approximately 4 eV.

### Claim 37 (depends on 34)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 34 wherein the spaced apart source/drain metal contacts define a channel region in the active layer, and portions of the metal oxide semiconductor active layer in contact with the source/drain metal contacts having a carrier concentration greater than a carrier concentration in the channel region.

### Claim 38 (depends on 37)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 37 wherein the carrier concentration in the portions of the metal oxide semiconductor active layer in contact with the source/drain metal contacts is greater than approximately 1 E18/cm3.

### Claim 39 (depends on 37)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 37 wherein the carrier concentration in the channel region of the metal oxide semiconductor active layer is reduced to less than 1 E18/cm3.

### Claim 40 (depends on 34)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 34 wherein the thin layer of low work function metal has a thickness less than 5 nm.

### Claim 41 (depends on 34)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 34 wherein the thin layer of low work function metal has a thickness less than 1 nm.

### Claim 42 (depends on 32)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 32 wherein the inorganic material in the etch stop passivation layer comprises oxygen.

### Claim 43 (depends on 32)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 32 wherein the inorganic material in the etch stop passivation layer comprises “liquid glass” material or silicones, including Dow Corning photopatternable WL5150, WL-3010, or Degussa's siloxane contained materials.

### Claim 44 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the insulating material of the etch stop passivation layer includes a composite material comprising an organic or inorganic polymer binder with compound nanoparticles.

### Claim 45 (depends on 44)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 44 wherein the binder includes at least one of glassy or thermal polymer materials.

### Claim 46 (depends on 44)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 44 wherein the compound nanoparticles include one of metal-oxides or metal sulfides with energy gaps larger than 3.1 eV.

### Claim 47 (depends on 33, 44)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 44 wherein the compound nanoparticles in claim 33A include one of TiO2, Ta2O5, SrO, SrTiO3, Al2O3, AlN, SiO2 and their combinations.

### Claim 48 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the insulating material of the etch stop passivation layer comprises at least one organo-metallic compound molecule.

### Claim 49 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the passivation layer is constructed to convey oxygen therethrough during the heating step to provide oxygen ambient.

### Claim 50 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the passivation layer includes material containing oxygen, the oxygen being released during the heating step to provide the oxygen ambient.

### Claim 51 (depends on 22)

A metal to metal oxide low resistance ohmic contact in a metal oxide semiconductor thin film transistor as claimed in claim 22 wherein the passivation layer includes an etch stop material.