# US 2014/0151691 A1 · Semiconductor device

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- Number: US 2014/0151691 A1
- Document ID: US20140151691A1
- Status: Published application
- Kind: A1
- Application number: 14/093,648
- Filed: 2013-12-02
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Daisuke Matsubayashi; Satoshi Shinohara; Wataru Sekine
- Web page: https://patentgrep.com/patent/US20140151691A1

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6708: {for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 84/813: {Combinations of field-effect devices and capacitor only}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device in which deterioration of electrical characteristics which becomes more noticeable as the transistor is miniaturized can be suppressed is provided. The semiconductor device includes an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over a substrate; a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor stack; a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating film. The first oxide semiconductor layer includes a first region. The gate insulating film includes a second region. When the thickness of the first region is TS1 and the thickness of the second region is TG1, TS1≧TG1.

## Claims

### Claim 1

A semiconductor device comprising:
a substrate;
an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over the substrate;
a source electrode layer and a drain electrode layer in contact with the oxide semiconductor stack;
a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and
a gate electrode layer over the gate insulating film,
wherein the first oxide semiconductor layer comprises a first region,
wherein the gate insulating film comprises a second region, and
wherein, when a thickness of the first region is TS1 and a thickness of the second region is TG1, TS1≧TG1.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein energy of a bottom of a conduction band of each of the first oxide semiconductor layer and the third oxide semiconductor layer is closer to a vacuum level than that of the second oxide semiconductor layer, and
wherein an energy difference of the bottom of the conduction band between the second oxide semiconductor layer and the first oxide semiconductor layer and an energy difference of the bottom of the conduction band between the second oxide semiconductor layer and the third oxide semiconductor layer are each greater than or equal to 0.05 eV and smaller than or equal to 2 eV.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1,
wherein the first to third oxide semiconductor layers are each formed using an In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), and
wherein a proportion of M with respect to In in an atomic ratio in each of the first and third oxide semiconductor layers is higher than that in the second oxide semiconductor layer.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1,
wherein the source electrode layer comprises a first source electrode layer which is in contact with the oxide semiconductor stack and a second source electrode layer which covers the first source electrode layer and is in contact with the oxide semiconductor stack, and
wherein the drain electrode layer comprises a first drain electrode layer which is in contact with the oxide semiconductor stack and a second drain electrode layer which covers the first drain electrode layer and is in contact with the oxide semiconductor stack.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the source electrode layer comprises a second source electrode layer which is in contact with the oxide semiconductor stack and a first source electrode layer which is over the second source electrode layer and is in contact with the oxide semiconductor stack, and
wherein the drain electrode layer comprises a second drain electrode layer which is in contact with the oxide semiconductor stack and a first drain electrode layer which is over the second drain electrode layer and is in contact with the oxide semiconductor stack.

### Claim 6 (depends on 4)

The semiconductor device according to claim 4,
wherein the first source electrode layer and the first drain electrode layer are each formed using Al, Cr, Cu, Ta, Ti, Mo, and W, or an alloy material comprising any of these materials as its main component, and
wherein the second source electrode layer and the second drain electrode layer are each formed using a material comprising tantalum nitride, titanium nitride, or ruthenium.

### Claim 7 (depends on 5)

The semiconductor device according to claim 5,
wherein the first source electrode layer and the first drain electrode layer are each formed using Al, Cr, Cu, Ta, Ti, Mo, and W, or an alloy material comprising any of these materials as its main component, and
wherein the second source electrode layer and the second drain electrode layer are each formed using a material comprising tantalum nitride, titanium nitride, or ruthenium.

### Claim 8

A semiconductor device comprising:
a first oxide semiconductor layer over a substrate;
a second oxide semiconductor layer over the first oxide semiconductor layer;
a first source electrode layer and a first drain electrode layer over the second oxide semiconductor layer;
a third oxide semiconductor layer over the second oxide semiconductor layer, the first source electrode layer, and the first drain electrode layer;
a second source electrode layer covering the first source electrode layer;
a second drain electrode layer covering the first drain electrode layer;
a gate insulating film over the third oxide semiconductor layer, the second source electrode layer, and the second drain electrode layer; and
a gate electrode layer over the gate insulating film,
wherein the first source electrode layer and the first drain electrode layer are in contact with the first to third oxide semiconductor layers,
wherein the second source electrode layer and the second drain electrode layer are in contact with the third oxide semiconductor layer,
wherein the first oxide semiconductor layer comprises a first region,
wherein the gate insulating film comprises a second region, and
wherein, when a thickness of the first region is TS1 and a thickness of the second region is TG1, TS1≧TG1.

### Claim 9 (depends on 8)

The semiconductor device according to claim 8,
wherein energy of a bottom of a conduction band of each of the first oxide semiconductor layer and the third oxide semiconductor layer is closer to a vacuum level than that of the second oxide semiconductor layer, and
wherein an energy difference of the bottom of the conduction band between the second oxide semiconductor layer and the first oxide semiconductor layer and an energy difference of the bottom of the conduction band between the second oxide semiconductor layer and the third oxide semiconductor layer are each greater than or equal to 0.05 eV and smaller than or equal to 2 eV.

### Claim 10 (depends on 8)

The semiconductor device according to claim 8,
wherein the first to third oxide semiconductor layers are each formed using an In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), and
wherein a proportion of M with respect to In in an atomic ratio in each of the first and third oxide semiconductor layers is higher than that in the second oxide semiconductor layer.

### Claim 11 (depends on 8)

The semiconductor device according to claim 8,
wherein the first source electrode layer and the first drain electrode layer are each formed using Al, Cr, Cu, Ta, Ti, Mo, and W, or an alloy material comprising any of these materials as its main component.

### Claim 12 (depends on 8)

The semiconductor device according to claim 8,
wherein the second source electrode layer and the second drain electrode layer are each formed using a material comprising tantalum nitride, titanium nitride, or ruthenium.

### Claim 13

A semiconductor device comprising:
a first oxide semiconductor layer over a substrate;
a second oxide semiconductor layer over the first oxide semiconductor layer;
a third oxide semiconductor layer over the second oxide semiconductor layer;
a gate insulating film over the third oxide semiconductor layer; and
a gate electrode layer over the gate insulating film,
wherein a thickness of the first oxide semiconductor layer is smaller than that of the gate insulating film.

### Claim 14 (depends on 13)

The semiconductor device according to claim 13,
wherein energy of a bottom of a conduction band of each of the first oxide semiconductor layer and the third oxide semiconductor layer is closer to a vacuum level than that of the second oxide semiconductor layer, and
wherein an energy difference of the bottom of the conduction band between the second oxide semiconductor layer and the first oxide semiconductor layer and an energy difference of the bottom of the conduction band between the second oxide semiconductor layer and the third oxide semiconductor layer are each greater than or equal to 0.05 eV and smaller than or equal to 2 eV.

### Claim 15 (depends on 13)

The semiconductor device according to claim 13,
wherein the first to third oxide semiconductor layers are each formed using an In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), and
wherein a proportion of M with respect to In in an atomic ratio in each of the first and third oxide semiconductor layers is higher than that in the second oxide semiconductor layer.