# US 2014/0151629 A1 · Confined resistance variable memory cells and methods

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- Number: US 2014/0151629 A1
- Document ID: US20140151629A1
- Status: Published application
- Kind: A1
- Application number: 14/083,069
- Filed: 2013-11-18
- Published: 2014-06-05
- Earliest claimed: 2010-07-26
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Zailong Bian
- Web page: https://patentgrep.com/patent/US20140151629A1

## CPC

- H10N 70/841: {Electrodes}
- H01C 1/02: Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C 7/13: current-responsive
- H01C 17/06: adapted for coating resistive material on a base
- H10N 70/066: {by filling of openings, e.g. damascene method}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- Y10T 29/49099: Coating resistive material on a base
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01C: RESISTORS
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

Methods, devices, and systems associated with resistance variable memory device structures are described herein. In one or more embodiments, a method of forming a confined resistance variable memory cell structure includes forming a resistance variable material such that a first unmodified portion of the resistance variable material contacts a bottom electrode and a second unmodified portion of the resistance variable material contacts a top electrode.

## Claims

### Claim at position 1

1-20. (canceled)

### Claim 21

A confined resistance variable memory cell, comprising:
a via in a structure that includes a bottom electrode, a top electrode, and a dielectric material between the bottom electrode and the top electrode;
a resistance variable material in the via, wherein the resistance variable material contacts the top electrode and the bottom electrode.

### Claim 22 (depends on 21)

The memory cell of claim 21, wherein the structure includes a conductive material coupled to the top electrode.

### Claim 23 (depends on 22)

The memory cell of claim 22, wherein the conductive material coupled to the top electrode is a bit line for the memory cell.

### Claim 24 (depends on 21)

The memory cell of claim 21, wherein the via is an opening in the dielectric material.

### Claim 25 (depends on 21)

The memory cell of claim 21, wherein a first unmodified portion of the resistance variable material contacts the bottom electrode and a second unmodified portion of the resistance variable material contacts the top electrode.

### Claim 26 (depends on 25)

The memory cell of claim 25, wherein the top electrode surrounds the second unmodified portion of the resistance variable material.

### Claim 27 (depends on 21)

The memory cell of claim 21, wherein:
the via is an opening in the conductive material; and
a diameter of the via is controlled by a thickness of the conductive material.

### Claim 28 (depends on 21)

The memory cell of claim 21, wherein the structure includes a conductive material coupled to the bottom electrode, and wherein the conductive material coupled to the bottom electrode is coupled to an access device.

### Claim 29

A confined resistance variable memory cell, comprising:
a resistance variable material formed in a via, where the resistance variable material contacts a bottom electrode with an unmodified portion of the resistance variable material and contacts a top electrode with an unmodified portion of the resistance variable material; and
a capping material formed over the resistance variable material.

### Claim 30 (depends on 29)

The memory cell of claim 29, wherein the resistance variable material is confined in the via.

### Claim 31 (depends on 29)

The memory cell of claim 29, wherein a conductive material is coupled to the top electrode and the conductive material is a bit line for the memory cell.

### Claim 32 (depends on 31)

The memory cell of claim 31, wherein the capping material is formed over the resistance variable material and the conductive material.

### Claim 33 (depends on 29)

The memory cell of claim 29, wherein the top electrode surrounds the unmodified portion of the resistance variable material that contacts the top electrode.

### Claim 34 (depends on 29)

The memory cell of claim 29, where:
the via is an opening in the conductive material; and
a diameter of the via is controlled by a thickness of the conductive material.

### Claim 35

A confined resistance variable memory cell, comprising:
a structure that includes a bottom electrode, a top electrode, and a dielectric material between the bottom electrode and the top electrode;
a via in the dielectric material; and
a resistance variable material in the via, where a first unmodified portion of the resistance variable material contacts the bottom electrode and a second unmodified portion of the resistance variable material contacts the top electrode.

### Claim 36 (depends on 35)

The memory cell of claim 35, wherein the structure includes a capping material over the resistance variable material.

### Claim 37 (depends on 35)

The memory cell of claim 35, wherein the bottom electrode is formed over a base semiconductor structure that includes a substrate.

### Claim 38 (depends on 35)

The memory cell of claim 35, wherein the memory cell is coupled to an access device.

### Claim 39 (depends on 35)

The memory cell of claim 35, wherein the top electrode surrounds the second unmodified portion of the resistance variable material.

### Claim 40 (depends on 35)

The memory cell of claim 35, wherein:
a conductive material is coupled to the top electrode;
the via is an opening in the conductive material; and
a diameter of the via is controlled by a thickness of the conductive material.