# US 2014/0151534 A1 · Image sensor including data transmission circuit having split bus segments

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- Number: US 2014/0151534 A1
- Document ID: US20140151534A1
- Status: Published application
- Kind: A1
- Application number: 14/095,082
- Filed: 2013-12-03
- Published: 2014-06-05
- Earliest claimed: 2012-12-03
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Kyo Jin CHOO; Eun Young JIN
- Web page: https://patentgrep.com/patent/US20140151534A1

## CPC

- H04N 25/767: Horizontal readout lines, multiplexers or registers
- H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

A data transmission circuit of an image sensor includes first to Kth bus segments, and first to Kth data regeneration circuits respectively connected to the first to Kth bus segments and the first to (K-1)th data regeneration circuits respectively connected to the second to Kth bus segments. Each of the first to Kth data regeneration circuits may be embodied as one of a buffer, a logic gate, and a synchronous circuit operating in response to a clock signal.

## Claims

### Claim 1

A data transmission circuit of an image sensor comprising:
first to Kth bus segments; and
first to Kth data regeneration circuits respectively connected to the first to Kth bus segments, and the first to (K-1)th data regeneration circuits respectively connected to the second to Kth bus segments.

### Claim 2 (depends on 1)

The data transmission circuit of claim 1, wherein each of the first to Kth data regeneration circuits is one of a buffer and a logic gate.

### Claim 3 (depends on 1)

The data transmission circuit of claim 1, wherein each of the first to Kth data regeneration circuits is a synchronous circuit operating in response to a clock signal.

### Claim 4 (depends on 1)

The data transmission circuit of claim 1, wherein the Kth data regeneration circuit is configured to output data of the Kth bus segment of the first to Kth bus segments as serial data.

### Claim 5 (depends on 1)

The data transmission circuit of claim 1, further comprising:
first to Kth address transmission circuits respectively transmitting addresses related to data transmitted through the first to Kth bus segments, the first to Kth address transmission circuits connected to each other in series.

### Claim 6 (depends on 5)

The data transmission circuit of claim 5, wherein each of the first to Kth address transmission circuits is one of a buffer and a logic gate.

### Claim 7 (depends on 5)

The data transmission circuit of claim 5, wherein each of the first to Kth address transmission circuits is a synchronous circuit operating in response to a clock signal.

### Claim 8 (depends on 5)

The data transmission circuit of claim 5, wherein a transmission timing of the data and a transmission timing of the address are synchronized with each other.

### Claim 9 (depends on 1)

The data transmission circuit of claim 1, wherein each of the first to Kth data regeneration circuits transmits respective data of the first to Kth bus segments in one direction.

### Claim 10 (depends on 1)

The data transmission circuit of claim 1, wherein each of the plurality of data regeneration circuits bi-directionally transmits respective data of the first to Kth bus segments.

### Claim 11

A portable electronic device comprising:
an image sensor including,
a pixel array,
an analog-to-digital converter circuit configured to convert an analog pixel signal output from the pixel array to a digital signal, and
a data transmission circuit configured to transmit data related to the digital signal,
the data transmission circuit having,
first to Kth bus segments, and
first to Kth data regeneration circuits respectively connected to the first to Kth bus segments and the first to (K-1)th data regeneration circuits respectively connected to the second to Kth bus segments; and
a processor configured to control an operation of the image sensor.

### Claim 12 (depends on 11)

The portable electronic device of claim 11, wherein each of the first to Kth data regeneration circuits is one of a buffer, a logic gate, and a synchronous circuit operating in response to a clock signal.

### Claim 13 (depends on 11)

The portable electronic device of claim 11, further comprising:
first to Kth address transmission circuits respectively transmitting addresses related to data transmitted through the first to Kth bus segments, the first to Kth address transmission circuits connected to each other in series.

### Claim 14 (depends on 11)

The portable electronic device of claim 11, wherein data of the first to Kth bus segments are sequentially transmitted through the first to Kth data regeneration circuits.

### Claim 15 (depends on 11)

The portable electronic device of claim 11, wherein data of the first to Kth bus segments are sequentially transmitted through the first to Kth data regeneration circuits operating in response to a clock signal.

### Claim 16

An image sensor comprising:
a pixel array;
an analog-to-digital converter configured to convert an analog pixel signal output from the pixel array to a digital signal; and
a data transmission circuit configured to transmit data related to the digital signal, the data transmission circuit including,
first to Kth bus segments, and
first to Kth data regeneration circuits respectively connected to the first to Kth bus segments and the first to (K-1)th data regeneration circuits respectively connected to the second to Kth bus segments.

### Claim 17 (depends on 16)

The image sensor of claim 16, further comprising:
a digital processing unit configured to generate addresses and configured to process data serially output from the data transmission circuit.

### Claim 18 (depends on 17)

The image sensor of claim 17, further comprising:
an encoding converter between the digital processing unit and the data transmission circuit, the encoding converter configured to encode and convert a first format code into a second format code.

### Claim 19 (depends on 18)

The image sensor of claim 18, wherein the first format code is one of one-hot, binary code, gray code, and thermometer code, and the second format code is the other one of the one-hot, the binary code, the gray code, and the thermometer code.

### Claim 20 (depends on 16)

The image sensor of claim 16, wherein a sum of lengths of the first to Kth bus segments is smaller than a length of the pixel array in an arrangement direction of the first to Kth bus segments.