# US 2014/0151532 A1 · Solid-state imaging device, and electronic system

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2014/0151532 A1
- Document ID: US20140151532A1
- Status: Published application
- Kind: A1
- Application number: 14/079,109
- Filed: 2013-11-13
- Published: 2014-06-05
- Earliest claimed: 2012-12-05
- Assignees: Sony Corporation
- Applicants: Sony Corporation
- Inventors: Yoshiaki Ito; Gen Kasai
- Web page: https://patentgrep.com/patent/US20140151532A1

## CPC

- H04N 25/771: comprising storage means other than floating diffusion
- H04N 25/616: involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

A solid-state imaging device includes: a pixel array including a plurality of pixels disposed in a matrix, the pixels including a charge holding section configured to hold a signal charge transferred from a photoelectric conversion section, and to include a capacitor section having a first capacitance value and an additional capacitor section for increasing the first capacitance value to be a second capacitance value; and to part of a reset transistor configured to reset a charge held by the charge holding section, a test-voltage power source configured to apply a test voltage having a voltage different from a drive voltage of the reset transistor.

## Claims

### Claim 1

A solid-state imaging device comprising:
a pixel array including a plurality of pixels disposed in a matrix, the pixels including a charge holding section configured to hold a signal charge transferred from a photoelectric conversion section, and to include a capacitor section having a first capacitance value and an additional capacitor section for increasing the first capacitance value to be a second capacitance value; and
to part of a reset transistor configured to reset a charge held by the charge holding section, a test-voltage power source configured to apply a test voltage having a voltage different from a drive voltage of the reset transistor.

### Claim 2 (depends on 1)

The solid-state imaging device according to claim 1,
wherein in each of the plurality of pixels in the pixel array,
before a pixel signal corresponding to light received by the photoelectric conversion section is read, the reset transistor is turned on so that the charge holding section holds a charge corresponding to the test voltage.

### Claim 3 (depends on 1)

The solid-state imaging device according to claim 1,
wherein in pixels in one predetermined row in the pixel array,
before a pixel signal corresponding to light received by the photoelectric conversion section is read, the reset transistor is turned on so that the charge holding section holds a charge corresponding to the test voltage.

### Claim 4 (depends on 3)

The solid-state imaging device according to claim 3,
wherein a light receiving section of the pixels in the one predetermined row in the pixel array is shaded, and
before a pixel signal corresponding to light received by the photoelectric conversion section is read, a transfer transistor configured to transfer a signal charge from the photoelectric conversion section to the charge holding section is turned on together with the reset transistor so that the photoelectric conversion section holds a charge corresponding to the test voltage.

### Claim 5 (depends on 1)

The solid-state imaging device according to claim 1, further comprising a calculation section configured to calculate a capacitance ratio being a ratio of the first capacitance value to the second capacitance value on the basis of a high gain signal generated on the basis of a signal voltage corresponding to a charge stored in the charge holding section when capacity of the charge holding section is set to the first capacitance value, and a low gain signal generated on the basis of a signal voltage when capacity of the charge holding section is set to the second capacitance value.

### Claim 6 (depends on 5)

The solid-state imaging device according to claim 5,
wherein each of the high gain signal and the low gain signal is a signal from which noise has been removed by correlated double sampling processing.

### Claim 7 (depends on 5)

The solid-state imaging device according to claim 5, further comprising a memory configured to store the capacitance ratio.

### Claim 8

An electronic system comprising:
a solid-state imaging device including
a pixel array including a plurality of pixels disposed in a matrix, the pixels including a charge holding section configured to hold a signal charge transferred from a photoelectric conversion section, and to include a capacitor section having a first capacitance value and an additional capacitor section for increasing the first capacitance value to be a second capacitance value; and
to part of a reset transistor configured to reset a charge held by the charge holding section, a test-voltage power source configured to apply a test voltage having a voltage different from a drive voltage of the reset transistor.
