# US 2014/0150258 A1 · Method of Manufacturing Wiring Substrate

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- Number: US 2014/0150258 A1
- Document ID: US20140150258A1
- Status: Published application
- Kind: A1
- Application number: 14/090,076
- Filed: 2013-11-26
- Published: 2014-06-05
- Earliest claimed: 2012-12-04
- Assignees: Shinko Electric Industries Co., Ltd.
- Applicants: Shinko Electric Industries Co., Ltd.
- Inventors: Noriyoshi SHIMIZU; Akio ROKUGAWA; Toshinori KOYAMA; Wataru KANEDA
- Web page: https://patentgrep.com/patent/US20140150258A1

## CPC

- H05K 3/007: {Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier (H05K1/187, H05K3/20 and H05K3/4682 take precedence)}
- H05K 3/20: by affixing prefabricated conductor pattern {(H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence)}
- H05K 3/4644: {by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602)}
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/095: {of vias therein}
- H10W 70/635: {Through-vias}
- H10W 70/685: comprising multiple insulating layers
- H05K 3/205: {using a pattern electroplated or electroformed on a metallic carrier}
- H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated}
- H05K 3/4682: {Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil}
- H05K 2201/09527: Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y10T 29/49126: Assembling bases
- Y10T 29/49128: Assembling formed circuit to base
- Y10T 29/49155: Manufacturing circuit on or in base
- Y10T 29/49165: by forming conductive walled aperture in base
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A wiring substrate includes a core portion and a wiring portion. The core portion includes a wiring layer and an organic resin core substrate. The wiring portion includes wiring layers and organic resin insulative layers. The wiring layer of the core portion is formed in a state in which the organic resin core substrate is supported by a support body. The wiring layers of the wiring portion are formed in a state in which the organic resin core substrate is adhered to a support body and the wiring layer of the core portion faces toward the support body.

## Claims

### Claim 1

A method of manufacturing a wiring substrate, the method comprising:
preparing a laminated plate in which a metal layer and an insulating layer are laminated;
adhering the laminated plate to a first support body with the metal layer facing the first support body;
forming a first wiring layer including vias that extend through the insulating layer and first pads exposed from a first surface of the insulating layer;
separating from the first support body a multilayer structure including the metal layer, the insulating layer, and the first wiring layer;
adhering the multilayer structure to a second support body with the first wiring layer facing the second support body;
removing the metal layer;
forming a plurality of second wiring layers including second pads that are connected to the vias and exposed from a second surface of the insulating layer that is opposite to the first surface; and
separating the insulating layer, the first wiring layer, and the plurality of second wiring layers from the second support body to obtain the wiring substrate.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the adhering the laminated plate to a first support body includes
forming a first adhesive layer on an edge of one surface of the first support body facing the metal layer, and
adhering the laminated plate to the first support body through the first adhesive layer.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the adhering the multilayer structure to a second support body includes
forming a second adhesive layer at an edge of one surface of the second support body facing the first wiring layer, and
adhering the multilayer structure to the second support body through the second adhesive layer.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the first wiring layer and the plurality of second wiring layers are formed through a semi-additive process.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the insulating layer is an organic resin layer.

### Claim 6 (depends on 1)

The method according to claim 1, wherein the insulating layer includes a plurality of insulating layers.

### Claim 7 (depends on 1)

The method according to claim 1, wherein the forming a first wiring layer includes forming the vias and the first pads in the insulating layer with the first support body supporting the laminated plate.

### Claim 8 (depends on 1)

The method according to claim 1, wherein the metal layer is removed with the second support body supporting the multilayer structure.

### Claim 9 (depends on 1)

The method according to claim 1, wherein the plurality of second wiring layers are formed with the second support body supporting the multilayer structure.