# US 2014/0146861 A1 · Serial digital interface between an rf transceiver and a baseband chip > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0146861 A1 - Document ID: US20140146861A1 - Status: Published application - Kind: A1 - Application number: 14/085,421 - Filed: 2013-11-20 - Published: 2014-05-29 - Earliest claimed: 2012-11-27 - Assignees: Aviacomm Inc. - Applicants: Aviacomm Inc. - Inventors: Tao Li; Hans Wang; Binglei Zhang; Shih Hsiung Mo - Web page: https://patentgrep.com/patent/US20140146861A1 ## CPC - H03M 9/00: Parallel/series conversion or vice versa (digital stores in which the information is moved stepwise per se G11C19/00) - H04B 1/40: Circuits - H04B 10/40: Transceivers - H04L 7/0041: {Delay of data signal} - H04L 7/041: {using special codes as synchronising signal} - H04M 1/738: Interface circuits for coupling substations to external telephone lines (H04M1/78 takes precedence) - H04Q 2213/13034: A/D conversion, code compression/expansion - H04Q 2213/13248: Multimedia - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04B: TRANSMISSION - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - H04M: TELEPHONIC COMMUNICATION (circuits for controlling other apparatus via a telephone cable and not involving telephone switching apparatus G08) - H04Q: SELECTING (switches, relays, selectors H01H; wireless communication networks H04W) ## Abstract One embodiment of the present invention provides a device for interfacing between a baseband controller and an RF integrated circuit (IC) chip having a modulator and a demodulator. The device includes an analog-to-digital converter (ADC) coupled to the demodulator located on the RF IC chip. The ADC is configured to receive demodulated analog signals from the demodulator. The device further includes a serializer configured to generate a serial data frame based on the ADC's output, a first serial data port configured to send the serial data frame to the baseband controller, and a control module coupled to the baseband controller. ## Claims ### Claim 1 A device for interfacing between a baseband controller and an RF integrated circuit (IC) chip having a modulator and a demodulator, comprising: an analog-to-digital converter (ADC) coupled to the demodulator located on the RF IC chip, wherein the ADC is configured to receive demodulated analog signals from the demodulator; a serializer configured to generate a serial data frame based on the ADC's output; a first serial data port configured to send the serial data frame to the baseband controller; and a control module coupled to the baseband controller. ### Claim 2 (depends on 1) The device of claim 1, further comprising: a deserializer coupled to the baseband controller, wherein the deserializer is configured to receive serial data from the baseband controller, and wherein the deserializer is configured to convert the serial data received from the baseband controller to parallel data; a DAC configured to convert the parallel data to analog signals; and an analog output configured to send the converted analog signals to the modulator. ### Claim 3 (depends on 1) The device of claim 1, further comprising a signal converter configured to convert between single-ended digital signals and differential digital signals. ### Claim 4 (depends on 3) The device of claim 3, wherein the differential digital signals are low-voltage differential signaling (LVDS) signals. ### Claim 5 (depends on 1) The device of claim 1, further comprising a clock module configured to provide clock signals to at least the ADC and the serializer. ### Claim 6 (depends on 1) The device of claim 1, wherein the control module includes at least a configuration register for controlling at least the ADC and the serializer, and a status register for indicating status of the serial data frame. ### Claim 7 (depends on 6) The device of claim 6, wherein the ADC and the serializer are configured to be powered down by the baseband controller setting a particular bit in the configuration register. ### Claim 8 (depends on 1) The device of claim 1, wherein the control module is coupled to the baseband controller via a serial peripheral interface. ### Claim 9 A wireless transceiver, comprising: an RF integrated circuit (IC) chip that comprises a modulator and a demodulator; a baseband controller; and an interfacing device configured to couple the RF IC chip with the baseband controller, wherein the interfacing device comprises: an analog-to-digital converter (ADC) coupled to the demodulator, wherein the ADC is configured to receive demodulated analog signals from the demodulator; a serializer configured to generate a serial data frame based on the ADC's output; a first serial data port coupled to the baseband controller, wherein the first serial port is configured to send the serial data frame to the baseband controller; and a control module coupled to the baseband controller. ### Claim 10 (depends on 9) The transceiver of claim 9, wherein the interfacing device further comprises: a deserializer coupled to the baseband controller, wherein the deserializer is configured to receive serial data from the baseband controller, and wherein the deserializer is configured to convert the serial data received from the baseband controller to parallel data; a DAC configured to convert the parallel data to analog signals; and an analog output coupled to the modulator, wherein the analog output is configured to send the converted analog signals to the modulator. ### Claim 11 (depends on 9) The transceiver of claim 9, wherein the interfacing device further comprises a signal converter configured to convert between single-ended digital signals and differential digital signals. ### Claim 12 (depends on 11) The transceiver of claim 11, wherein the differential digital signals are low-voltage differential signaling (LVDS) signals. ### Claim 13 (depends on 9) The transceiver of claim 9, wherein the interfacing device further comprises a clock module configured to provide clock signals to at least the ADC and the serializer. ### Claim 14 (depends on 9) The transceiver of claim 9, wherein the control module includes at least a configuration register for controlling at least the ADC and the serializer, and a status register for indicating status of the serial data frame. ### Claim 15 (depends on 14) The transceiver of claim 14, wherein the ADC and the serializer are configured to be powered down by the baseband controller setting a particular bit in the configuration register. ### Claim 16 (depends on 9) The transceiver of claim 9, wherein the control module is coupled to the baseband controller via a serial peripheral interface.