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US 2014/0145759 A1Published application
Systems and methods for preventing saturation of analog integrator output
AssigneeThe Trustees of Columbia University in the City of New York
InventorsYannis TSIVIDIS, Ning GUO
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Abstract
Systems and methods for preventing saturation of analog integrator outputs are provided. Applications of the systems and methods in hybrid analog-digital integrators are also provided. Exemplary systems include two switches, one operational amplifier, one capacitor C, four gain blocks, three comparators, one XOR gate, one OR gate, one T flip-flop, and one digital counter.
Claims30
A system for preventing saturation of an integrator output comprising:
- an integrator receiving an input signal and generating an output;
- and
- a digital counter having a value and configured to adjust the value of the digital counter when an output of the integrator reaches a threshold;
- wherein the input signal is reversed when the output of the integrator reaches the threshold;
- and
- wherein the digital counter combines the value of the digital counter with the output of the integrator to generate a combined output.
3 more elements
A method for preventing saturation of an integrator output comprising:
- providing an integrator receiving an input signal and generating an output;
- and
- adjusting a value of a digital counter when the output of the integrator reaches a threshold;
- reversing the input signal when the output of the integrator reaches the threshold;
- and
- combining the value of the digital counter with the output of the integrator to generate a combined output.
3 more elements
Dependencies are inferred from the claim text.