Encryption processing circuit and decryption processing circuit, methods thereof, and programs thereof
AssigneeNEC Corporation
InventorNoritaka Yamashita
Life of this patent
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AssigneeNEC Corporation
InventorNoritaka Yamashita
Estimating the term…
An encryption processing circuit capable of inhibiting leakage of secret information from bit transitions of a register while inhibiting an increase in performance/area ratio is provided. N (N is an integer equal to 2 or greater) sets, each of which including an encryption block and a register, are included, wherein an encryption block of an i-th set performs encryption in a certain step on plain text stored in the register of the i-th set or intermediate data stored in the register of the i-th set obtained from the plain text and the intermediate data obtained by the encryption is stored in the register of an (i+1)-th set and the encryption block of an N-th set performs the encryption in the certain step on plain text stored in the register of the N-th set or intermediate data stored in the register of the N-th set obtained from the plain text and the intermediate data obtained by the encryption is stored in the register of a first set.
1-10. (canceled)
An encryption processing circuit that encrypts plain text in a plurality of steps by using a cryptographic key, the circuit comprising:
A decryption processing circuit that decrypts cipher text in a plurality of steps by using a cryptographic key, the circuit comprising:
An encryption processing method of encrypting plain text in a plurality of steps by using a cryptographic key, wherein:
A decryption processing method of decrypting cipher text in a plurality of steps by using a cryptographic key, wherein:
A non-transitory computer readable medium storing an encryption processing program causing a computer to function as an encryption processing circuit that encrypts plain text in a plurality of steps by using a cryptographic key, wherein:
A non-transitory computer readable medium storing a decryption processing program causing a computer to function as a decryption processing circuit that decrypts cipher text in a plurality of steps by using a cryptographic key, wherein:
Dependencies are inferred from the claim text.