Data-dependent pullup transistor supply and body bias voltage application for a static random access memory (sram) cell

A method, comprising:

• detecting a logic state of a data signal to be written to a true data storage node of a memory circuit having a true pullup transistor coupled between a true supply node and the true data storage node;
• if the detected logic state is logic low, then applying a first supply voltage to the true supply node during a write operation;
• and
• if the detected logic state is logic high, then applying a second supply voltage to the true supply node during the write operation;
• wherein said second supply voltage is higher than the first supply voltage.

A circuit, comprising:

• a memory cell having a true data storage node, a true pullup transistor coupled between a true supply node and the true data storage node, a complement data storage node and a complement pullup transistor coupled between a complement supply node and the complement data storage node;
• a true switching circuit having a first input coupled to receive a first supply voltage, a second input coupled to receive a second supply voltage, and an output coupled to the true supply node;
• a complement switching circuit having a first input coupled to receive the first supply voltage, a second input coupled to receive the second supply voltage, and an output coupled to the complement supply node;
• and
• a logic circuit configured to cause the true switching circuit to apply the second supply voltage to the true supply node during a write operation to write a logic high data value to the true data storage node and to apply the first supply voltage to the true supply node during a write operation to write a logic low data value to the true data storage node;
• and
• wherein the second supply voltage is greater than the first supply voltage.