Pre-Charge During Programming For 3D Memory Using Gate-Induced Drain Leakage

A 3D stacked non-volatile memory device, comprising:

• an uninhibited NAND string which is selected for programming and comprises a channel, a selected non-volatile storage element which is selected for programming, a plurality of unselected non-volatile storage elements which are not selected for programming, a drain-side select gate comprising a drain and a control gate, and a source-side select gate;
• a first bit line connected to the drain of the drain-side select gate of the uninhibited NAND string;
• an inhibited NAND string which comprises a channel, a non-volatile storage element which is connected via a selected word line to the selected non-volatile storage element, a plurality of other unselected non-volatile storage elements which are connected via unselected word lines to the plurality of unselected non-volatile storage elements, a drain-side select gate comprising a drain and a control gate, and a source-side select gate;
• a second bit line connected to the drain of the drain-side select gate of the inhibited NAND string;
• a conductive path which connects the control gate of the drain-side select gate of the inhibited NAND string to the control gate of the drain-side select gate of the uninhibited NAND string;
• and
• a control circuit, the control circuit:
• in a program portion of a program-verify iteration, drives a voltage of the channel of the uninhibited NAND string and floats a voltage of the channel of the inhibited NAND string, during the float, increases the voltage of the channel of the inhibited NAND string to a pre-charge level using gate-induced drain leakage from the drain-side select gate of the inhibited NAND string and increases the voltage of the channel of the inhibited NAND string from the pre-charge level to a program inhibit level using capacitive coupling, and while the voltage of the channel of the inhibited NAND string is at the program inhibit level, increases a voltage of the selected word line to a programming level and maintains the voltage of the selected word line at the programming level to program the selected non-volatile storage element.

A method for programming in a 3D stacked non-volatile memory device, comprising:

• pre-charging a voltage of a channel of an inhibited NAND string to a pre-charge level using gate-induced drain leakage from a drain-side select gate of the NAND string, the inhibited NAND string comprises a non-volatile storage element which is connected to a selected non-volatile storage element of an uninhibited NAND string via a selected word line, and a plurality of non-volatile storage elements which are connected to a plurality of unselected non-volatile storage elements via a corresponding plurality of unselected word lines;
• increasing the voltage of the channel from the pre-charge level to a program inhibit level by capacitive coupling from the plurality of unselected word lines to the channel;
• and
• maintaining the voltage of the channel at the program inhibit level while programming the selected non-volatile storage element by increasing a voltage of the selected word line to a programming level.