Semiconductor memory device
AssigneeFujitsu Semiconductor Limited
InventorRyo TANABE
Life of this patent
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Abstract
A semiconductor memory device including a memory cell of static type; a word line connected to the memory cell; a word driver driving the word line; and a compensating circuit including a first transistor of N-channel type having a drain connected to the word line and a source to be connected to a ground potential, and a control circuit connected to the first transistor and changing the first transistor from an OFF state to an ON state based on a rise of an ambient temperature or a rise of a power source voltage to thereby lower a voltage of the word line.
Claims6
A semiconductor memory device comprising:
- a memory cell of static type;
- a word line connected to the memory cell;
- a word driver driving the word line;
- and
- a compensating circuit including a first transistor of N-channel type having a drain connected to the word line and a source to be connected to a ground potential, and a control circuit connected to the first transistor and changing the first transistor from an OFF state to an ON state based on a rise of an ambient temperature or a rise of a power source voltage to thereby lower a voltage of the word line.
A semiconductor memory device comprising:
- a memory cell of static type;
- a word line connected to the memory cell;
- a word driver driving the word line;
- and
- a compensating circuit including a first transistor of N-channel type having a gate and a drain connected to the word line, and a second transistor of N-channel type having a gate and a drain connected to a source of the first transistor and a source to be connected to a ground potential.
Dependencies are inferred from the claim text.