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US 2014/0112061 A1Published application
Write word-line assist circuitry for a byte-writeable memory
AssigneeQUALCOMM Incorporated
InventorsChangho Jung, Nishith Desai, Sei Seung Yoon
Life of this patent
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Abstract
A write-assisted memory. The write-assisted memory includes a word-line decoder that is implemented within a low VDD power domain. The write-assisted memory also includes a write-segment controller that is partially implemented within the low VDD power domain and is partially implemented within a high VDD power domain. The write-assisted memory further includes a local write word-line decoder that is implemented within the high VDD power domain.
Claims20
A write-assist method, comprising:
- operating a main write word-line decoder within a low VDD power domain;
- and
- operating a portion of a write segment controller and a local write word-line decoder within a high VDD power domain.
A write-assisted memory, comprising:
- a main write word-line decoder within a low VDD power domain;
- a write segment controller partially within the low VDD power domain and partially within a high VDD power domain;
- and
- a local write word-line decoder within the high VDD power domain.
1 more element
A byte-writeable memory, comprising:
- means for supplying a global write word-line (GWWL) signal in response to a bank select signal and a word line select signal within a low VDD power domain of the byte-writeable memory;
- and
- means for generating a local write word-line (LWWL) signal in response to the GWWL signal and a write byte select signal within a high VDD power domain of the byte-writeable memory to enable a write assist in the byte-writeable memory.
Dependencies are inferred from the claim text.