Semiconductor device having data bus
AssigneeElpida Memory, Inc.
InventorsTakamitsu ONDA, Hisayuki NAGAMINE
Life of this patent
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Abstract
A semiconductor device is disclosed which comprises a first wiring layer, a second wiring layer formed over the first wiring layer, data input/output terminals, and a data bus formed in the first and second wiring layers. The data bus includes N data lines transmitting data between a predetermined circuit and the input/output terminals. M first data lines among the N data lines have a length shorter than a predetermined length and residual N-M second data lines have a length longer than the predetermined length. Shield lines adjacent to the N data lines are formed in the first and second layers. The N data lines are arranged at positions at which the data lines do not overlap one another in a stacking direction of the first and second wiring layers.
Claims14
A semiconductor device comprising:
- a first wiring layer;
- a second wiring layer formed over the first wiring layer;
- a plurality of data input/output terminals inputting/outputting data;
- a data bus formed in the first and second wiring layers, the data bus including N (N is an integer greater than 1) data lines through which data is transmitted between a predetermined circuit and the plurality of data input/output terminals, the N data lines comprising M (M is an integer satisfying M<N) first data lines and remaining N-M second data lines, each of the M first data lines having a length shorter than a predetermined length, each of the N-M second data lines having a length longer than the predetermined length;
- a plurality of shield lines each being adjacent to each of the N data lines formed in the first and second layers;
- and
- the N data lines arranged at positions at which the data lines do not overlap one another in a stacking direction of the first and second wiring layers.
A semiconductor device comprising:
- a multilevel wiring structure including a first-level wiring layer, a second-level wiring layer and an interlayer insulating film between the first-level and second-level wiring layers;
- first, second and third data lines extending in substantially parallel to one another, the second data line being between the first and second data lines, the second data line being formed as one of the first-level and second-level wiring layers, and each of the first and second data line being formed as the other of the first-level and second-level wiring layers;
- and
- first and second shielding lines, the first shielding line being formed as the one of the first-level and second-level wiring layers and extending in substantially parallel to the second data line, and the second shield line being formed as the other of the first-level and second-level wiring layers and being between the first and third data lines in substantially parallel thereto.
Dependencies are inferred from the claim text.