Timing controller and display device having the same

A display device comprising:

• a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of pixels each connected to a corresponding data line of the data lines and a corresponding gate line of the gate lines;
• a gate driver configured to drive the gate lines;
• a data driver configured to drive the data lines;
• and
• a timing controller configured to receive image signals, apply a data signal and a plurality of first control signals to the data driver, and apply a plurality of second control signals to the gate driver, the timing controller comprising:
• a dithering unit configured to output a first signal in which bit widths of image signals are reduced;
• an image pattern detector configured to detect an image pattern of the image signals and output a dithering off signal corresponding to the detected image pattern;
• a dithering selector configured to receive the first signal and convert the first signal to a second signal in response to the dithering off signal;
• and
• a response time compensator configured to generate a present image signal from the second signal and compensate a liquid crystal response time in accordance with a difference between the present image signal and a first previous image signal to output a data signal.

A timing controller comprising:

• a dithering unit configured to perform a dithering operation on input image signals to generate a first signal;
• an image pattern detector configured to generate an indicator signal indicating whether the input image signals include a particular image pattern;
• a selector configured to output the first signal when the indicator signal indicates the input image signals exclude the particular image pattern and output the first signal with at least one of its lower bits altered when the indicator signal indicates the input image signals include the particular image pattern;
• a compensation unit configured to output a restored version of the first signal when the restored version matches a previous image signal and output the previous image signal otherwise;
• and
• a dynamic capacitance compensation (DCC) circuit configured to perform a DCC operation on the output of the compensation circuit and the first signal to output a data signal.