Programmable revision cell id system and method
AssigneeConexant Systems, Inc.
InventorKhosrow Golshan
Life of this patent
Estimating the term…
Abstract
An integrated circuit comprising a plurality of metal programmable revision identification (MPRI) cells, wherein each MPRI cell further comprises a plurality of metal layers, a plurality of vias and an output.
Claims16
An integrated circuit comprising:
- a plurality of metal programmable revision identification (MPRI) cells, wherein each MPRI cell further comprises:
- a plurality of metal layers;
- a plurality of vias;
- and
- an output.
A method for identifying an integrated circuit revision, comprising:
- generating a first cell output using a first configuration of metal layers and vias;
- and
- generating a second cell output using a second configuration of metal layers and vias;
- wherein the first configuration of metal layers and vias is different from the second configuration of metal layers and vias.
In an integrated circuit having a plurality of metal programmable revision identification (MPRI) cells, wherein each MPRI cell includes a plurality of metal layers, a plurality of vias and an output, and the integrated circuit further includes a first MPRI cell of the plurality of MPRI cells that has a different configuration of vias than a second MPRI cell of the plurality of MPRI cells, the first MPRI cell of the plurality of MPRI cells has a different configuration of metal layers than the second MPRI cell of the plurality of MPRI cells, a third MPRI cell of the plurality of MPRI cells has an identical configuration of vias as the first MPRI cell of the plurality of MPRI cells, and the third MPRI cell of the plurality of MPRI cells has an identical configuration of metal layers as the third MPRI cell of the plurality of MPRI cells, a method for identifying an integrated circuit revision, comprising:
- generating the first MPRI cell output using a first configuration of metal layers and vias;
- generating the second MPRI cell output using a second configuration of metal layers and vias;
- generating the third MPRI cell output using a third configuration of metal layers and vias;
- storing the first MPRI cell output, the second MPRI cell output and the third MPRI cell output in a non-transient data memory device;
- receiving a revision change control;
- retrieving the first MPRI cell output, the second MPRI cell output and the third MPRI cell output from the non-transient data memory device;
- revising the first MPRI cell output using a fourth configuration of metal layers and vias;
- and
- storing the revised first MPRI cell output, the second MPRI cell output and the third MPRI cell output in the non-transient data memory device.
Dependencies are inferred from the claim text.