Integrated circuit chip and system having the same
AssigneeSK hynix Inc.
InventorSeung-Min OH
Life of this patent
Estimating the term…
Abstract
An integrated circuit chip includes: an internal circuit; a data output circuit configured to output a data packet of the internal circuit in response to a strobe signal; an oscillator configured to generate a first clock signal; a divider configured to divide the first clock signal and generate a second clock signal; and a strobe signal supply unit configured to supply the second clock signal as the strobe signal during an initial period of transmission of the data packet and supply the first clock signal as the strobe signal after the initial period.
Claims13
1-10. (canceled)
An integrated circuit chip comprising:
- an internal circuit;
- a data output circuit configured to output a data packet of the internal circuit in response to a strobe signal;
- an oscillator configured to generate the strobe signal having a frequency corresponding to a bias voltage;
- and
- a bias voltage generation unit configured to generate the bias voltage at a first voltage level during an initial period of transmission of the data packet and generate the bias voltage at a second voltage level higher than the first voltage level after the initial period.
An integrated circuit comprising:
- an internal circuit;
- a data output circuit configured to output a data packet of the internal circuit in response to a strobe signal;
- an oscillator configured to generate the strobe signal having a frequency corresponding to a bias voltage;
- and
- a bias voltage generation unit configured to generate the bias voltage at a voltage level that gradually increases during an initial period of transmission of the data packet and remains at constant voltage level after the initial period.
19-22. (canceled)
A system comprising:
- a first chip;
- a second chip;
- and
- a data channel between the first and second chips,
- wherein the first chip comprises:
- an internal circuit;
- a data output circuit configured to output a data packet of the internal circuit to the data channel in response to a strobe signal;
- an oscillator configured to generate the strobe signal having a frequency corresponding to a bias voltage;
- and
- a bias voltage generation unit configured to generate the bias voltage at a first voltage level during an initial period of transmission of the data packet and generate the bias voltage at a second voltage level higher than the first voltage level after the initial period.
A system comprising:
- a first chip;
- a second chip;
- and
- a data channel between the first and second chips,
- wherein the first chip comprises:
- an internal circuit;
- a data output circuit configured to output a data packet of the internal circuit to the data channel in response to a strobe signal;
- an oscillator configured to generate the strobe signal having a frequency corresponding to a bias voltage;
- and
- a bias voltage generation unit configured to generate the bias voltage that gradually increase during an initial period of a transmission period of the data packet and remains at a constant voltage level after the initial period.
(canceled)
Dependencies are inferred from the claim text.