Transition delay detector for interconnect test

A structure comprising a first die and a second die electrically connected to one another by at least a first inter-die interconnect, wherein at least one of the first die and the second die comprises:

• a first electrical circuit;
• and
• a test circuitry configured to test for transition delay defects in the at least one inter-die interconnect, wherein the test circuitry comprises:
• an input port for receiving a test data value;
• a data storage element configured to temporarily store the test data value;
• a second inter-die interconnect configured to be electrically connected to the first inter-die interconnect so as to form a feedback loop for transferring the test data value from the data storage element back to the data storage element;
• a data conditioner configured to condition the fed back test data value so as to make it distinguishable from the stored test data value;
• a clock pulse generator configured to generate a delayed clock pulse;
• a selection logic for applying the generated delayed clock pulse and the conditioned fed back test data value to the data storage element;
• and
• a readout unit for reading out a test data value stored in the data storage element.

A method of testing transition delay defects in inter-die interconnects in a structure comprising a first die and a second die electrically connected to one another by at least a first inter-die interconnect, the method comprising:

• receiving a test data value;
• temporarily storing the test data value in a data storage element;
• transmitting the test data value from the first die over a feedback loop comprising the first inter-die interconnect and a second inter-die interconnect back to the first die;
• conditioning the fed back test data value so that it is distinguishable from the received test data value and feeding it to the data storage element;
• and
• determining whether after a pre-determined delay the test data value or the conditioned test data value is stored in the data storage element, and therefrom deciding whether a transition delay defect occurred.