Wafer-Level Package and Method for Production Thereof

A wafer-level package for an electrical component comprising:

• a first piezoelectric wafer, component structures being arranged on a first surface of the first piezoelectric wafer;
• a second piezoelectric wafer, second component structures being arranged on the second piezoelectric wafer;
• a metallic frame structure connected to the first surface of the first wafer and a surface of the second wafer such that a hermetically sealed cavity enclosed by the frame structure is formed between the first and second wafers;
• electrical connections on a surface of the second wafer that faces away from the cavity;
• pillar-type electrical connections supported within the cavity on first and second wafers and electrically connected to first and/or second component structures;
• and
• contact pads within the cavity on inner surfaces of the first and second wafers;
• wherein the first component structures and the second component structures are enclosed within the cavity and are connected to the electrical connections via plated through-holes through the second wafer;
• wherein all the plated through-holes end either on the frame structure, on a pillar or on a contact pad, without violating the hermeticity of the cavity;
• and
• wherein the frame structure, the pillars and the contact pads substantially consist of copper.

A method for producing a wafer-level package, the method comprising:

• providing a first piezoelectric wafer having first component structures on its top side and a first partial structure of a frame structure;
• providing a second piezoelectric wafer having second component structures on its top side and underside and a second partial structure of the frame structure on its underside;
• joining together first and second wafers by the partial structures of the frame structure and carrying out a wafer bonding method for producing a hermetic connection, such that the connected first and second partial structures produce the frame structure that hermetically encloses a cavity between the first and second wafers;
• drilling second holes from the top side of the second wafer, wherein first or second component structures are exposed, and wherein a laser ablation method is used for drilling;
• and
• metalizing the surface of the second wafer in order to produce a plated through-hole to the first and second component structures and the frame structure and in order to produce an electrical connection connected to the respective plated through-hole.