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US 2014/0110820 A1Published application
Passive component as thermal capacitance and heat sink
AssigneeInfineon Technologies Austria AG
InventorsMartin STANDING, Milko PAOLUCCI
Life of this patent
Estimating the term…
Abstract
Representative implementations of devices and techniques provide improved thermal performance of a chip die disposed within a layered printed circuit board (PCB). Passive components may be strategically located on one or more surfaces of the PCB. The passive components may be arranged to conduct heat generated by the chip die away from the chip die.
Claims25
A system, comprising:
- a printed circuit board (PCB) including at least a first layer and a second layer;
- a chip die disposed between the first layer and the second layer;
- and
- a passive component strategically located on an outer surface of one of the first layer or the second layer, and arranged to conduct heat generated by the chip die away from the chip die.
1 more element
A method, comprising:
- strategically locating a passive component on an outer surface of one of a first layer or a second layer of a printed circuit board (PCB) such that the passive component conducts heat generated by a chip die disposed between the first layer and the second layer away from the chip die;
- and
- coupling the passive component to the outer surface of the one of the first layer or the second layer of the PCB at the location.
A method, comprising:
- strategically coupling a plurality of passive components to an outer surface of a first layer and an outer surface of a second layer of a multi-layer printed circuit board (PCB) such that the passive components conduct heat generated by a chip die embedded between two layers of the PCB away from the chip die, and the passive components conduct electrical current as part of an electrical circuit that includes the chip die.
A system, comprising:
- a multi-layer printed circuit board (PCB) including a plurality of layers;
- a chip die embedded within the PCB, between two of the plurality of layers;
- and
- a passive circuit component strategically located on an outer surface of one of the two layers of the plurality of layers, and arranged to conduct heat generated by the chip die away from the chip die.
1 more element
Dependencies are inferred from the claim text.