High Voltage Diode

A method of fabricating a semiconductor device, comprising in any order:

• providing a semiconductor substrate region of a first conductivity type within an isolation structure comprising a deep trench isolation region formed to surround the semiconductor substrate region, a buried insulator layer formed at the bottom of the semiconductor substrate region, and at least a first shallow trench isolation region formed on a surface of the semiconductor substrate region;
• forming a heavily doped first terminal contact region of the first conductivity type in a first terminal contact area of the semiconductor substrate region;
• forming a heavily doped second terminal contact region of a second conductivity type in a second terminal contact area of the semiconductor substrate region to be spaced apart from the first terminal contact area;
• forming a first terminal well region of the first conductivity type in the semiconductor substrate region under at least the first terminal contact area to be in ohmic contact with the first terminal contact region as finally formed;
• and
• forming a second terminal well region of the second conductivity type in the semiconductor substrate region under at least the second terminal contact area to be in ohmic contact with the second terminal contact region as finally formed, where the second terminal well region extends laterally to a peripheral end portion that is located under the first terminal contact area of the semiconductor substrate region and that is adjacent to the first terminal well region as finally formed.

A method for forming a high voltage diode device, comprising:

• providing a semiconductor-on-insulator substrate comprising a semiconductor substrate layer formed over a buried insulator layer and surrounded by a deep trench isolation region;
• forming shallow trench isolation regions on the substrate layer to define a first terminal contact opening separate from a second terminal contact opening by a first shallow trench isolation region;
• and then, in any order:
• selectively implanting a heavily doped first terminal contact region of a first conductivity type in the substrate layer in the first terminal contact opening;
• selectively implanting a deep first terminal well region of the first conductivity type in the substrate layer around the heavily doped first terminal contact region;
• selectively implanting a shallow first terminal well region of the first conductivity type in the substrate layer to extend laterally to a peripheral end portion located under the second terminal contact opening;
• and
• selectively implanting a peripheral second terminal well region of a second conductivity type in the substrate layer under the second terminal contact area to be positioned adjacent to the peripheral end portion of the shallow first terminal well region as finally formed;
• and then
• selectively implanting a heavily doped second terminal contact region of the second conductivity type in the substrate layer in the second terminal contact opening so as to be spaced apart and separated from the heavily doped first terminal contact region by the first shallow trench isolation region.