Resurf High Voltage Diode
AssigneeFreescale Semiconductor, Inc.
InventorsXin Lin, Daniel J. Blomberg, Hongning Yang, Jiang-Kai Zuo
Life of this patent
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Abstract
A trench-isolated RESURF diode structure (100) is provided which includes a substrate (150) in which is formed anode (130, 132) and cathode (131) contact regions separated from one another by a shallow trench isolation region (114, 115), along with a buried cathode extension region (104) formed under a RESURF anode extension region (106, 107) such that the cathode extension region (104) extends beyond the cathode contact (131) to be sandwiched between upper and lower regions (103, 106, 107) of opposite conductivity type.
Claims20
A semiconductor diode device, comprising:
- a semiconductor substrate region;
- an isolation structure for electrically isolating the semiconductor substrate region comprising a deep trench isolation region formed around the semiconductor substrate region and at least a first shallow trench isolation region located on a surface of the semiconductor substrate region;
- a heavily doped first terminal contact region of a first conductivity type formed in the semiconductor substrate region;
- a heavily doped second terminal contact region of a second conductivity type formed in the semiconductor substrate region to be spaced apart from the heavily doped first terminal contact region;
- a first terminal extension region of the first conductivity type located in the semiconductor substrate region to surround the heavily doped first terminal contact region and to extend part way to the heavily doped second terminal contact region;
- and
- a second terminal extension region of the second conductivity type located in the semiconductor substrate region to surround the heavily doped second terminal contact region and to extend below the first terminal extension region.
The semiconductor diode device of claim where the first terminal extension region and second terminal extension region form a p-n junction at a bottom surface of the first shallow trench isolation region.
A method of fabricating a semiconductor device, comprising in any order:
- forming a heavily doped second terminal contact region of a second conductivity type in a semiconductor substrate region;
- forming a second terminal extension region of the second conductivity type in the semiconductor substrate region to surround the heavily doped second terminal contact region, where the second terminal extension region comprises a buried RESURF extension region that extends laterally past the heavily doped second terminal contact region;
- forming a heavily doped first terminal contact region of the first conductivity type in a first terminal contact area of the semiconductor substrate region to be spaced apart from the heavily doped second terminal contact region;
- and
- forming a first terminal extension region of the first conductivity type in the semiconductor substrate region around the heavily doped first terminal contact region, the first terminal extension region located above the buried RESURF extension region and extending part way toward the heavily doped second terminal contact region, thereby forming a lateral p-n junction at the surface of the semiconductor substrate region between the first terminal extension region and second terminal extension region and below a shallow trench isolation region formed on a surface of the semiconductor substrate region.
A method for forming a high voltage diode device, comprising:
- providing a semiconductor-on-insulator substrate comprising a substrate layer formed over a buried insulator layer and surrounded by a deep trench isolation region;
- forming shallow trench isolation regions on the substrate layer to define a second terminal contact opening separated from a first terminal contact opening by a first shallow trench isolation region;
- and then, in any order:
- selectively implanting a heavily doped second terminal contact region of a second conductivity type in the substrate layer in the second terminal contact opening;
- selectively implanting an second terminal extension region of the second conductivity type in the substrate layer around the heavily doped second terminal contact region, where the second terminal extension region comprises a buried RESURF extension region that extends laterally past the heavily doped second terminal contact region;
- selectively implanting a heavily doped first terminal contact region of a first conductivity type in the first terminal contact area of the substrate layer to be spaced apart from the heavily doped second terminal contact region;
- and
- selectively implanting a peripheral first terminal well region of the first conductivity type in the substrate layer, where the peripheral first terminal well region extends laterally above the buried RESURF extension region of the second terminal extension region and toward the heavily doped second terminal contact region, and wherein the peripheral first terminal well region and second terminal extension region form a lateral p-n junction at the surface of the substrate layer below the first shallow trench isolation region.
Dependencies are inferred from the claim text.