Cmos transistor and fabrication method
AssigneeSemiconductor Manufacturing International Corp.
InventorZHONGSHAN HONG
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Abstract
Exemplary embodiments provide transistors and methods for forming the transistors. An exemplary CMOS transistor can be formed by epitaxially forming a first stress layer in/on a semiconductor substrate having a first region including a first gate structure and a second region including a second gate structure. A barrier layer can be formed to cover the second region and to expose the first region. The barrier layer can be used as a mask to remove a portion of the first stress layer from the first region. A second stress layer can be formed in a groove formed in the semiconductor substrate on sides of the first gate structure in the first region. The fabrication method can be simplified and the formed CMOS transistors can have high carrier mobility.
Claims20
A method for forming a CMOS transistor comprising:
- providing a semiconductor substrate including a first region having a first gate structure formed on the semiconductor substrate and a second region having a second gate structure formed on the semiconductor substrate;
- forming a first stress layer on the semiconductor substrate and on sides of each of the first gate structure and the second gate structure by a selective epitaxial deposition process;
- forming a barrier layer to cover the second gate structure and the first stress layer in the second region and to expose the first gate structure and a portion of the first stress layer in the first region;
- removing the portion of the first stress layer in the first region using the barrier layer as a mask;
- forming a groove in the semiconductor substrate on each side of the first gate structure in the first region;
- and
- forming a second stress layer in the groove.
A CMOS transistor comprising:
- a semiconductor substrate including a first region having a first gate structure formed on the semiconductor substrate and a second region having a second gate structure formed on the semiconductor substrate;
- a first stress layer epitaxially disposed on sides of the second gate structure;
- and
- a second stress layer disposed on sides of the first gate structure,
- wherein the first stress layer and the second stress layer are formed by a process including:
- forming a stress layer on the semiconductor substrate and on the sides of each of the first gate structure and the second gate structure;
- forming a barrier layer to cover the second gate structure and the stress layer in the second region and to expose the first gate structure and a portion of the stress layer in the first region;
- removing the portion of the stress layer in the first region using the barrier layer as a mask, wherein a remaining portion of the stress layer forms the first stress layer;
- forming a groove in the semiconductor substrate on each of the sides of the first gate structure in the first region;
- and forming the second stress layer in the groove.
Dependencies are inferred from the claim text.