Source Tip Optimization For High Voltage Transistor Devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRu-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Chih-Chang Cheng, Ruey-Hsin Liu
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRu-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Chih-Chang Cheng, Ruey-Hsin Liu
Estimating the term…
The present disclosure provides a method for fabricating a high-voltage semiconductor device. The method includes designating first, second, and third regions in a substrate. The first and second regions are regions where a source and a drain of the semiconductor device will be formed, respectively. The third region separates the first and second regions. The method further includes forming a slotted implant mask layer at least partially over the third region. The method also includes implanting dopants into the first, second, and third regions. The slotted implant mask layer protects portions of the third region therebelow during the implanting. The method further includes annealing the substrate in a manner to cause diffusion of the dopants in the third region.
A semiconductor device, comprising:
A method comprising:
A device comprising:
Dependencies are inferred from the claim text.