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US 2014/0110753 A1Published application
Methods of Making JFET Devices with Pin Gate Stacks
AssigneeMicron Technology, Inc.
InventorChandra Mouli
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Abstract
Devices and methods for providing JFET transistors with improved operating characteristics are provided. Specifically, one or more embodiments of the present invention relate to JFET transistors with a higher diode turn-on voltage. For example, one or more embodiments include a JFET with a PIN gate stack. One or more embodiments also relate to systems and devices in which the improved JFET may be employed, as well as methods of manufacturing the improved JFET.
Claims20
A transistor, comprising:
- a semiconductor substrate comprising a source region and a drain region;
- a doped channel region formed in the semiconductor substrate between the source region and the drain region, the channel region configured to pass current between the source region and the drain region;
- and
- a gate comprising an intrinsic material formed over the channel region, and a doped semiconductor material formed over the intrinsic material, wherein the gate and the doped channel region form a PIN diode.
1 more element
A transistor, comprising:
- a doped channel region;
- an intrinsic material directly on the doped channel region;
- and
- a doped semiconductor material formed on the intrinsic material, wherein the doped semiconductor material, the intrinsic material and the doped channel form a PIN diode.
1 more element
A transistor, comprising:
- a source region and a drain region;
- a doped channel region between the source region and the drain region;
- and
- a gate formed directly on the doped channel region, wherein the gate and the doped channel region form a PIN diode.
1 more element
Dependencies are inferred from the claim text.