Semiconductor light emitting element and method of manufacturing semiconductor light emitting element

A method of manufacturing a semiconductor light emitting element, comprising:

• a covering portion forming process that forms a covering portion to cover a partial region on a semiconductor layer in a semiconductor lamination substrate, which is formed by laminating the semiconductor layer that includes a light emitting layer to emit light by passing a current and is composed of a group III nitride on a substrate, the covering portion being composed of a material different from the material of the semiconductor layer;
• a dividing groove forming process that forms a plurality of dividing grooves that intersect each other in the covering portion and divide the semiconductor layer into plural regions by locally removing the semiconductor layer in the semiconductor lamination substrate, in which the covering portion is formed, from a side where the covering portion is formed to reach the substrate;
• and
• a wet etching process that performs wet etching on the semiconductor lamination substrate in which the covering portion and the plurality of dividing grooves are formed.

A method of manufacturing a semiconductor light emitting element, comprising:

• a semiconductor removing process that locally removes part of a semiconductor layer in a semiconductor lamination substrate, which is formed by laminating the semiconductor layer that includes a light emitting layer to emit light by passing a current and is composed of a group III nitride on a substrate, from a side opposite to the substrate, to thereby form an asperity portion in which the semiconductor layer is partially recessed and partially projected;
• a dividing groove forming process that locally removes part of the semiconductor layer in the semiconductor lamination substrate, in which the asperity portion is formed, from the side opposite to the substrate to reach the substrate, to thereby form a plurality of dividing grooves that intersect each other in the asperity portion and divide the semiconductor layer into plural regions;
• and
• a wet etching process that performs wet etching on the semiconductor lamination substrate in which the asperity portion and the plurality of dividing grooves are formed.