# US 2014/0072075 A1 · Dynamic digital pre-distortion system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0072075 A1 - Document ID: US20140072075A1 - Status: Published application - Kind: A1 - Application number: 14/083,335 - Filed: 2013-11-18 - Published: 2014-03-13 - Earliest claimed: 2007-04-20 - Assignees: Microelectronics Technology Inc. - Applicants: Microelectronics Technology, Inc. - Inventors: Khiem V. Cai; David B. Rutan; Ahmad Khanifar; Armando C. Cova - Web page: https://patentgrep.com/patent/US20140072075A1 ## CPC - H04B 1/62: for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio - H03F 1/3241: {using predistortion circuits (H03F1/3211, H03F1/3217 take precedence)} - H03F 1/3247: {using feedback acting on predistortion circuits (H03F1/3264 takes precedence)} - H03F 1/3294: {Acting on the real and imaginary components of the input signal} - H03F 3/24: of transmitter output stages - H04B 1/0475: {with means for limiting noise, interference or distortion (H04B1/0483 takes precedence)} - H04B 17/13: of power amplifiers, e.g. gain or non-linearity - H04W 52/52: using AGC [Automatic Gain Control] circuits or amplifiers - H03F 2200/336: A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit - H03F 2200/451: the amplifier being a radio frequency amplifier - H03F 2201/3224: Predistortion being done for compensating memory effects - H04B 2001/0425: {with linearisation using predistortion} - H04B: TRANSMISSION - H03F: AMPLIFIERS - H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72) ## Abstract A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip. ## Claims ### Claim 1 A method for an apparatus for delaying a pre-distorted transmit signal of data samples at a given data rate prior to its transmission by a distorting element or distorting system, comprising: routing successive data samples of the transmit signal to N parallel data paths in a round-robin fashion, each of the N parallel data paths being independently configurable to produce a delay of zero or one delay unit, wherein one delay unit is equal to a period of the given data rate multiplied by N; connecting each of the N parallel data paths to N parallel data inputs of an N×N crossbar, the crossbar being configurable to route any of the N parallel data inputs to any of N parallel data outputs of the crossbar; re-combining successive data samples from the N parallel data paths into a single data path to reconstitute the transmit signal; and configuring the N parallel data paths and the crossbar to produce an effective delay at the reconstituted transmit signal of zero to N−1 periods of the given data rate. ### Claim 2 An apparatus for delaying a pre-distorted transmit signal of data samples at a given data rate prior to its transmission by a distorting element or distorting system, comprising: N parallel data paths being independently configurable to produce a delay of zero or one delay unit, wherein one delay unit is equal to a period of the given data rate multiplied by N; a first commutator coupled to the N parallel data paths and configured for routing successive data samples of the transmit signal to the N parallel data paths in a round-robin fashion, each of the N parallel data paths being independently configurable to produce a delay of zero or one delay unit, wherein one delay unit is equal to a period of the given data rate multiplied by N; an N×N crossbar coupled to the N parallel data paths and configured for connecting each of the N parallel data paths to N parallel data inputs of an N×N crossbar, the crossbar being configurable to route any of the N parallel data paths to any of N parallel data outputs of the crossbar; and a second commutator coupled to the N×N crossbar and configured for re-combining successive data samples from the N parallel data paths into a single data path to reconstitute the transmit signal; wherein the N parallel data paths and the crossbar are configurable to produce an effective delay at the reconstituted transmit signal of zero to N−1 periods of the given data rate. ### Claim 3 A computer program product for delaying a pre-distorted transmit signal of data samples at a given data rate prior to its transmission by a distorting element or distorting system, and including one or more computer readable instructions embedded on a non-transitory computer readable storage medium and configured to cause one or more computer processors to perform the steps of: routing successive data samples of the transmit signal to N parallel data paths in a round-robin fashion, each of the N parallel data paths being independently configurable to produce a delay of zero or one delay unit, wherein one delay unit is equal to a period of the given data rate multiplied by N; connecting each of the N parallel data paths to N parallel data inputs of an N×N crossbar, the crossbar being configurable to route any of the N parallel data inputs to any of N parallel data outputs of the crossbar; re-combining successive data samples from the N parallel data paths into a single data path to reconstitute the transmit signal; and configuring the N parallel data paths and the crossbar to produce an effective delay at the reconstituted transmit signal of zero to N−1 periods of the given data rate.